[FRAM71] Pre-Production Batch

[Sylvain Cote]

(03-15-2015 02:55 PM)Dave Frederickson Wrote:  What I'd like to know is, with 10 pre-production FRAM71's out there, am I the only one who's even updated the firmware?

I have bought a Microsemi FlashPro 5 unit just for that. I will upgrade it when I have the unit back.

(03-15-2015 02:55 PM)Dave Frederickson Wrote:  [*]Have you considered offering the 1MByte upgrade as an option?

I am ready to pay extra for the 1MB upgrade of my next two units.

(03-15-2015 02:55 PM)Dave Frederickson Wrote:  [*]I suggest the programming header added to the standard configuration. I think that's why some folks haven't updated their firmware.

I completely agree and second the suggestion.

Thank you very much Dave for your dedication to improve and document the FRAM71 module, very appreciated.
And of course, a huge thanks to you Hans for making and improving the FRAM71 module.

Sylvain

[Dave Frederickson]

(03-15-2015 03:34 PM)Sylvain Cote Wrote:  

(03-15-2015 02:08 AM)rprosperi Wrote:  The most complete list I recall seeing was posted here (last summer?) by Sylvain. Search the archives, should be quick to find. If not here, it was in an email, which I can dig for if you strike out searching.

Here is my list ...

Code:

Product                          ROM Image       Size   Version
-------------------------------  --------------  -----  --------------------
HP-71 Demo ROM (c) HP 1984       HP71DEMO-A.ROM  16 KB  DEMO:A
82401A  Interface Loop           HPILROM-1A.ROM  16 KB  HPIL:1A
82401A  Interface Loop           HPILROM-1B.ROM  16 KB  HPIL:1B
82479A  Data Acquisition Pac     DATAACQ-A.ROM   64 KB  INST:A TCNV:A FMT:A
82480A  Mathematics              MATHROM-1A.ROM  32 KB  MATH:1A
82481A  AC Circuit Analysis      CIRCUIT-A.ROM   16 KB  CIRC:A
82482A  Finance Pac              FINANCE-A.ROM   16 KB  FIN:A
82483A  Surveying Pac            SURVEY-A.ROM    16 KB  SURV:A
82484A  Curve Fitting Pac        CURVEFIT-A.ROM  32 KB  FIT:A
82485A  Text Editor              TEXTEDIT-A.ROM  16 KB  EDT:A
82488A  Data Communications Pac  DATACOMM-A.ROM  16 KB  DC:A
82489A  AMPI Statistics Pac      AMPISTAT-A.ROM  32 KB  AMPISTAT:A
82490A  HP-41 Translator Pac     FTH41-1A_1.ROM  16 KB  FTH41:1A EDT:A
                                 FTH41-1A_2.ROM  32 KB  From E0000 to E7FFF
82478A  Forth Assemby/Debugger   FORTH-1A_1.ROM  16 KB  FTH:1A EDT:A KBD:B
                                 FORTH-1A_2.ROM  32 KB  From E0000 to E7FFF
DATAMNGT by Jim Donnelly         DATAMNGT-B.ROM  32 KB  DATA:B
ZENWAND Zengrange BarCode Wand   ZENWAND-1A.ROM  16 KB  WAND:1A DHSS:1A
JPC-ROM Journal Paris Chapter    JPC-E1.ROM      32 KB  JPC:E1 EPRM:C ECPY:F
JPC-ROM Journal Paris Chapter    JPC-F01.ROM     32 KB  JPC:F01
AMPROM1 AMP House ROM1           AMP-ROM1.ROM    32 KB  n/a
AMPROM2 AMP House ROM2           AMP-ROM2.ROM    64 KB  R2:5.0A

There's an IRAM image of Richard Harvey's Workbook71 in the lexfl1 LIF image and we also have the 71B Diagnostic ROM. J-F was able to dump it years ago but deemed the image useless until we have a Clonix71. Now we do.

(03-15-2015 03:41 PM)Sylvain Cote Wrote:  

(03-15-2015 02:55 PM)Dave Frederickson Wrote:  What I'd like to know is, with 10 pre-production FRAM71's out there, am I the only one who's even updated the firmware?

I have bought a Microsemi FlashPro 5 unit just for that. I will upgrade it when I have the unit back.

The programming header and cable parts needed to make an adapter are available as FREE samples from Samtec. Bob tried to buy the parts but they insisted on sending them to him at no cost. Let me know if you need the part numbers.

Dave

[Hans Brueggemann]

(03-15-2015 02:55 PM)Dave Frederickson Wrote:  

1. How is a configuration cycle triggered? I know that FREEPORT and CLAIMPORT are one method, but they're not programmable.
2. If the goal is to not have to cycle power to change configurations, then what's with step 4)?
   

some comments on V500:
1) on-the-fly alterations are possible for F-Block addresses only, which are then directly written into FRAM71's MMU. so, you essentially keep the configuration unaltered, but let the modules point to different F-Blocks. that's why a configuration cycle is not required (which is of course only true if there is nothing in the F-Blocks that gets referenced by the file-chain! Version 4.xx prohibits this and requires the MMU-data to be updated via a power-cycle to minimize the chance of file-chain corruption).
step 4 in my previous post suggests that you then may further change the configuration to your likings.
2) memory-sizes and -types can't be altered in this manner and still require a power-cycle in order to announce the config change to the HP-71B.

Restoring of memory contents can be tedious if you have to restore a lot of ROM images in your HP-71B. with V500, you can do a backup/restore of all FRAM contents under program control.

production batch:
folks that have pre-ordered the FRAM71 get informed separately via e-mail about the manufacturing status. as of today, material purchase is complete (so, currently not taking any orders) and i'm waiting for the manufacturer to assign a timeslot. as suggested, all production batch units will have a programming header installed. as for the 1 MByte version, i haven't decided on this yet.

hans

[Dave Frederickson]

(03-15-2015 04:56 PM)Hans Brueggemann Wrote:  all production batch units will have a programming header installed.

I discovered that the second FRAM chip would be easier to install without the header present. If the 1MByte option remains "user-installed" then it would be desirable to leave the header uninstalled until the FRAM chip is installed. A male header would make for a simpler adapter cable. Was there a specific reason for a female header?

Dave

[Dave Frederickson]

(03-14-2015 09:18 PM)Dave Frederickson Wrote:  Works so far.

Well, "so far" wasn't very. The bottom FRAM works just fine, but the top FRAM doesn't respond to writes to the config address space. I've inspected the soldering work for shorts and loose pins and have found no issues. Any suggestions?

Dave

[Hans Brueggemann]

(03-16-2015 03:51 PM)Dave Frederickson Wrote:  The bottom FRAM works just fine, but the top FRAM doesn't respond to writes to the config address space. I've inspected the soldering work for shorts and loose pins and have found no issues. Any suggestions?

Dave

dave,
from your photos,
1) the FRAM chip is of the correct type and correctly oriented on the board
2) the wire goes to the correct pin CN6:7 on the pcb.
3) the wire goes to the correct pin 6, !CE, on the FRAM chip
4) not clear on picture: make sure that there is no connection between !CE of bottom FRAM and !CE2 on top FRAM

let's see whether there is a problem with the !CE2 signal of the top FRAM.

here is a correct write cycle as measured on V430 during POKE "2C000", "9" with bankswitching enabled.
CD, STR, HP-BUS are signals on the internal HP-71B bus
OE, WE, CE are FRAM control signals at their respective pins, all active LOW
CE2 is chip_enable of the top FRAM, active LOW
   
depending on the resources at hand, you can check the following:
1) with the HP-71B running idle on SYSROM (J1:open, J2:closed), !CE2 must be always logic HIGH (=3.3V), regardless of the bankswitch setting. you can check this with a DVM in DC mode.
2) assuming that you have either an OS- or the dignostic image loaded into SYSRAM of lower FRAM, you can perform the following "dirty test" to verify whether !CE2 is correctly asserted:
a. turn bankswitching on and turn on your HP-71B.
b. measure the voltage at CN6:7 with a DVM. if 3.3V +/- 100mV, then o.k. otherwise, probably fried chip (either FRAM, FPGA, or both)
c. remove J1, insertJ2. do _not_ set OD. this enables the HP-71B to run on SYSROM, but at the same time generates lots of pulses on !CE2, which leads to a measurable DC voltage drop. Correction: remove J2, insert J1
d. measure the voltage at CN6:7 with a DVM. reading should be approx. 3% below the reading at point c.
e. make sure to remove J2 and insert J1 after the test.

if you have a scope, you can of course verify !CE2 according to the above picture at the following pins:
!WE: CN4:16
!OE: CN6-4
!CE: CN4-5
!CE2: CN6-7

if in test 2) the !CE2 isn't getting "busy" with lots of pulses, let me know so i can have a closer look into it.


hans
(edit 2015-03-23: corrected jumper positions in RED)

[Dave Frederickson]

Results:

Test 1: Activity was measured when a static signal was expected.

Click to zoom


Test 2:
Step a. The top FRAM is enabled.
Setp b. Activity as in Test 1.
Step c. 3.3V logic high, expected activity.

At this point I suspect a logic issue, not hardware.

Dave

[Hans Brueggemann]

thanks dave, that helps a lot. first of all, there is an error in my previous post regarding the jumper settings of J1, J2. please note corrections in red.
what i can see from your test results:
test 1)
a. the scope picture is showing !CE activity during a display blink. as a side note, it seems that there is an HPIL module attached to the HP-71B, which doesn't interfere with the test, though. leave as is.
b. because there is activity regardless of the bankswitch setting, the PADCHECK on CN2:1 is now a suspect.
test 2)
step b. activity at this point hints at J1: closed, J2:open (SYSRAM active, but should be SYSROM active)
step c. no activity at this point hints at J1:open, J2:closed (SYSROM active, but should be SYSRAM active)

so, actually two issues here: one logic (human, see my previous post for corrections in red) error, and the other one probably on the pad-checking on CN2:1.
it seems that you tested this on a 2CDCC mainframe, is that correct?
can you please confirm with the corrected jumper (J1, J2) settings:
test 2b showing no activity, and
test 2c showing activity as measured on your scope plot?

will be sending you a V431 with slightly modified pad-checking per e-mail.


hans

[Dave Frederickson]

(03-23-2015 07:19 AM)Hans Brueggemann Wrote:  it seems that there is an HPIL module attached to the HP-71B
it seems that you tested this on a 2CDCC mainframe, is that correct?

Correct in both cases. Impressive that you can determine that by looking at a chip enable. A little reminiscent of Spock decoding the beeps and boops of the Enterprise's computer.

I discovered a bunch of pins that weren't soldered. Rather than try to fix this tonight I'll take care of it tomorrow using a proper microscope.

Dave

[Dave Frederickson]

Initial tests are positive. Thanks for the help, Hans. I'll perform more extensive tests tonight.

Dave

[Hans Brueggemann]

i have currently three FRAM71 with the 1MByte modification on my bench and, while the soldering job isn't too demanding (i don't have a steady hand, hence i'm just using a big spade shaped soldering tip and a lot uf flux and then swipe it across the pins, https://www.youtube.com/watch?v=5uiroWBkdFY), the unconnected pins are indeed very difficult to discover. however, with bankswitching enabled, POKE "2C000","FF" followed by a PEEK$("2C000",2) points you directly to the affected data lines, for example.

if you have a scope, you may want to try an endless loop such as
10 POKE "2C000", "FF" @ GOTO 10
and check signal activity on all lines directly at the bottom FRAM (i.e., at the pad on the pcb) and then check whether the top FRAM pins show the same amount of activity.

while testing with POKE/PEEK$, you may observe various symptoms and causes:
1) data read differ from data written
missing data line, or missing address line
2) data read back is always zero
missing !WE, !OE, !ZZ, VDD (!WE, !OE are very short pulses)
3) data read back is correct, but HP-71B doesn't assign memory correctly
missing address line

hans
(btw... still waiting for some users to respond and send me their ship-to addresses)

[Hans Brueggemann]

FRAM71 is currently shipping with firmware V501, which has the following restriction:
Trying to configure Chip_0 as part of a module that contains multiple Chips may cause data corruption under certain circumstances. Unfortunately, I discovered this bug just yesterday, and i'm still investigating it.
As a workaround, it is sufficient to ensure that Chip_0 is configured as LCIM.
There is no V501 manual available yet, but you may use the V430 manual which covers all features of V501, except this:
V501 allows you to re-define F_addresses of F_Blocks "on-the-fly", i.e., without the need to power-cycle your HP-71B. Thus, you now can backup/restore the contents of all F_Blocks under program control, rather than having to powercycle your HP-71B after each F_Block address change. Note that this leads to sometimes interesting, albeit understandable "side-effects" on how FRAM71's memory is presented in the calculator's address space. ...Let the fun begin!

Future firmware development will allow for TOP/BOTTOM FRAM bank-switching under program control (as opposed to manual bank-switching as we have it in V430). However this implies the use of "Control words" to be recognized by FRAM71. How should these look like? All ideas welcome!
(Keep in mind though, that this not going to happen any time before 2016...)


On a side note to those who have placed a pre-order:
please make sure that you order your module no later than by end of May. All "leftovers" will be distributed among those who are already queuing up to snatch them, first come, first serve.


Best regards,
Hans

[cruff]

The tracking info says mine arrived in New Jersey this afternoon. It could be here as early as Saturday or the first half of next week!

[Dave Frederickson]

(04-24-2015 12:40 AM)cruff Wrote:  The tracking info says mine arrived in New Jersey this afternoon. It could be here as early as Saturday or the first half of next week!

Congratulations! Did you go for the deluxe 1Mb model or the standard 512k?

[Didier Lachieze]

I've received mine (a standard 512k).
Thanks Hans for this amazing extension for an already amazing device.
Btw, where can I find ROM files such as the 41 translator ?

[Michael Lopez]

Hi all,

I also received mine yesterday (V501 with 512kB[/font]) & have had a brief opportunity to "play" with it after installing in one of my 71Bs. As others have already said, a great addition to our old computers :-).

I already have ROM images for most of the add-ons I want to install but have never come across the image for the 41 Translator ROM. Do however have one of these actual ROMs in another 71B & a PIL-Box, so if anyone can guide me on how to do it I'd be happy to try & create an image.

At least speaking for myself, we have so much to learn about how to take advantage of the FRAM71 module, that I would love to see a dedicated website somewhere or at least a sub-section on the MoHPC site. This way it is easy to share & keep up to date.

Cheers,

Michael

[Dave Frederickson]

(04-24-2015 05:19 AM)Didier Lachieze Wrote:  Btw, where can I find ROM files such as the 41 translator ?

Here are the HP ROM's, courtesy of Sylvain and Bob.

Here's the rare AMP House Financial ROM set.

Finally, here's the Singapore Fire Behavior ROM.

If anyone has the companion Fire Danger ROM, the ballistic ROM set, or any other 71 ROM's, HP-Collection is creating a catalog.

The dump procedure is in the Emu71/Win manual.

Dave

Edit: The ROM images can be used with either of the Emu71 emulators as well.

[Marcus von Cube]

(04-23-2015 07:12 PM)Hans Brueggemann Wrote:  On a side note to those who have placed a pre-order:
please make sure that you order your module no later than by end of May. All "leftovers" will be distributed among those who are already queuing up to snatch them, first come, first serve.

I plan to pick up mine directly from Hans. If I'm not mistaken we live close to each other. (I'm not a home at the moment so the transaction has to wait until early May.)

[Didier Lachieze]

Dave, many thanks for the files and the links. These are great resources for the FRAM71 module owners

[Sylvain Cote]

My first one (FRAM71-1MB) just arrived in Canada and the customs has it.
I should received it next week.
Sylvain