(09-03-2017 06:11 AM)Alejandro Paz(Germany) Wrote: DO you have any specifics on the processor used by these machines ? Is it similar to say the one in a FX-850P ? I know it is a later machine
There's a lot of information on casio calculators here:
http://www.pisi.com.pl/piotr433/
This page has the schematic created by reverse engineering, so there's quite a lot of information about the pins:
http://www.pisi.com.pl/piotr433/fx502sch.pdf
I'm pretty sure that the FX850P uses a different processor. The newer the technology, the harder it is to see the features on the chip as they get smaller and smaller. The older Casios should be OK for viewing, up to the FX880, I'd guess.
I also found this on the hp forums:
(02-26-2017 11:12 PM)jebem Wrote: Good question on the processor type, Alejandro.
The only source of information on these Casio internal architecture that I'm aware of is from Piotr Piatek.
Apparently these Hitachi or NEC processors from that period are custom designed for the job and are not based on any other common model like the Zilog Z80 or the Intel 4004 or 8080, or the 6502 series.
Crossing that information from Piotr Piatek with some more pictures of Casio internals from other folks like Kyoro and checking the SRAM memory types and interfaces, it seems that there are two main groups of processors concerning the data bus size that may imply a specific ALU size as well.
- 4-bit data bus processors:
HD61747 fx-5500, fx-5200P, fx-4000P, FC-200, PB-120, PB-500,
HD61913 fx-700P
HD61917 PB-700
HD43191 fx-602P, fx-702
HD43108 fx-502P
- 8-bit data bus processors:
HD61700 8-bit PB-1000
HD62002 8-bit fx-603P
HD62076 8-bit SF-9300
HD62021 ?-bit fx-61F
HD62001 ?-bit fx-5000F, fx-3900P
There is a pattern in the naming convention, where the HD61 series are 4-bit (with one exception only for the HD61700) and the HP62 are 8-bit processors.
So this HD62001 Processor is very close to the HD62002 and therefore could be a 8-bit processor.
Additionally, why did Casio use a interface controller between the processor and the SRAM memory on this fx-5000F?
The only cases I'm aware of are to allow a 4-bit processor to access a 8-bit data wide SRAM, or the other way around like in this case, where a 8-bit processor access an HD61914C 4-bit data wide SRAM memory.
(The HD61914C is very well documented and uses a 4-bit data wide bus).
So, probably this Hitachi HD62001 processor uses a 8-bit data bus connected to a HD61914C 1024 4-bit words SRAM thru a OKI M5268V-H1 interface controller that is aggregating SRAM 4-bit data word pairs into 8-bit words to present to the CPU.
I can't find information on the OKI M5268V-H1 either, but looking into the circuit I can see this OKI chip interfacing the SRAM to the Processor.
Search
Member List
Calendar
Help
