PX41CX

[goosnarrggh]

(11-02-2022 05:18 AM)Sylvain Cote Wrote:  

(11-02-2022 02:43 AM)agarza Wrote:  Currently, the only way to add modules to the PX41CX is to flash them along with the firmware.

Are you sure ?

From what I am reading ...
1) the maximum directly Flash addressing space is 16 bits or 64 KB
2) the first 32KB is reserved for code, divided between boot code and app code while the second 32KB is reserved for data
3) of the 128KB Flash
3a) the first 32KB is reserved for code (mapped into the direct addressing space)
3b) and the last 96KB can be divided into three 32KB data blocks of which one can be mapped into the direct addressing space.
4) you also have three USART that can be used for RS232 transmission

So with code, you could come with a scheme that allows data transfer (ROM images) transfer over the serial interface and store the data into one of the three 32KB data pages.
You could then map a data page containing the ROMs into the address space. For sure it will be a little more complicated than that, but it seems doable.

Remember, the AVR is a Harvard architecture machine. It has two separate addressing spaces, one for fetching instructions, and the other for fetching/storing data. The Flash is mapped simultaneously into both address spaces via asymmetrical means. When it is accessed as program memory, it is addressed as an array of 16-bit words; when it is accessed as data memory, it is addressed as an array of 8-bit bytes.

Direct program memory addressing (via the JMP/CALL instructions) is able to directly access a theoretical maximum 22-bit address space, yielding a maximum of 4MiWords, or 8MiB. However, I am not aware of any AVR devices ever having been built which more than 256kiB of Flash.

Indirect program memory access is more limited; the IJMP and ICALL instructions are linked to the Z pointer register, which is 16-bits wide. Thus (unless page switching is employed) they are only able to address a maximum of 64kiWords, or 128kiB. For parts with 128kiB of flash or less, IJMP and ICALL are thus also able to reach the entire Flash memory without the need for page switching. However, page switching (via the RAMPZ register) is added in parts with larger amounts of Flash.

The entirety of Flash can also be indirectly treated as Data memory, using the LPM instruction, which (unlike when Flash is accessed as Program memory) actually addresses the Flash in terms of bytes instead of words. It also fetches data from Flash via the 16-bit Z pointer. Thus, page switching (via the RAMPZ register) is included to allow data to be fetched from Flash addresses above the 64kiB boundary.

One innovation in more recent AVR designs is the ability to also *directly* address Flash as data, by mapping a programmable 32kiB block of it into the direct addressing data space, where the full suite of direct and indirect addressing modes (normally used to access data in RAM) can also be used to access information within whichever 32kiB block of Flash is currently mapped into that space.

But mapping any given 32kiB subset block of Flash into the data address space does NOT take away from the WHOLE of flash always being accessible as program memory.