Casio 4bit SRAM replacement project

[Jeff_Birt]

I have been able to back up and restore the entire 1K RAM on the PB-100. It takes about 100ms to backup or restore. Ironically it also takes 100ms to debounce the switch I'm using to start the process. Also managed to change one program line from A=5 to A=8 so figuring out the tokenization should not bee too difficult.

Now working on mimicking the RAM in the PB-100 by sniffing the bus and doing the same writes to the RAM in the PIC. This seems like a good stepping stone to syncing reads with the PB-100 clock. I've also captured the start up and reset with the LA so I know how the RAM needs to respond. It is rather simple and PB-100 reads/writes/reads to various address in each of the two RAM chips which can be on the BUS. If it reads back what it writes then it knows the RAM is present.