HP-65 1333A04841 restoration it doesn't work anymore ...

[teenix]

In one read oscilloscope trace the pulse widths look longer. I know the data clocking is somewhat controlled by having the RA RB data bits interlaced, but I don't know how the width of the pulses affect the data.

The 65 relies on correct timing for cards due to the method of data transfer to and from memory.

I don't know what generates a read error, because there are no circuit details inside the hybrid, but I suspect it must come from the CRC chip and may be due to a program memory under or overflow during reads. Too many or not enough bits read for example.

There could also be a set amount of clock cycles allowed to read each change of a data bit, and if these are exceeded an error occurs. (Just guessing)

Can you write to a card with the faulty CPU board. If so, does this card read ok.

The "Init" signal from the hybrid is there to reset the circuits after switch on. There is a test point for this available. Maybe monitoring this at switch on you will be able to see the change of state in relation to the power coming on. It should change to the operational state after the power supply has stabilized. I imagine the operational state is a Logic HI.

If it is not too difficult, changing the tantalum caps shouldn't hurt. There is a 2.2uF cap connected to the "InitC" pin on the hybrid. (Pin 36) This might need changing as it is responsible for the timing for the reset pulse.

cheers

Tony