Emulator vs simulator performance

[Christoph Giesselink]

(06-10-2020 12:16 PM)Didier Lachieze Wrote:  

(06-10-2020 07:57 AM)J-F Garnier Wrote:  The 42S is supposed to run at 1MHz, does somebody know the speed of the 32SII CPU?

According to Wikipedia the Lewis CPU used in the 42S runs at 1MHz and the Sacajawea CPU used in the 32SII runs at 640Hz.

These speed settings at Wikipedia are from me contributed many years ago. But I'm not sure about the values for the 1LU7 Bert and 1LR3 Sacajawea chips any more. First, the PCB for the Low-End Pioneers contain no crystal. The external component on a 1LU7 PCB is a capacitor and the external components on a 1LR3 PCB are a capacitor and a resistor.

But how I get the "Authentic Speed" value for Emu42 emulating a HP32SII?

In this case I gone a more practical way.

I programmed Katie Wasserman 99 Digits of PI on an HP 32SII on a real HP32SII and measured the execution time. It took around the 11 minutes like mentioned in the article. With this measured time I adjusted the Sacajawea CPU cycles reference inside Emu42 to a value of 54, so that the real and emulated calculator needs more or less the equal time executing this program.

What does this number 54 mean? Execute 54 CPU cycles in a 16384 Hz time frame, so 54 * 16384 Hz = 884736 Hz.

BTW, the CPU cycles reference in Emu42 for a 1MHz Lewis CPU is 61 (61 * 16384 Hz = 999424 Hz).

Can I proof this calculated frequency? This depends on the memory type the assembler code is running. On all memory devices which are connected directly to the Saturn bus, the CPU cycles inside Emu42 are correct. But when the memory device is accessed over a Saturn bus to 8 bit converter to access regular static RAM or ROM devices with 8 bit data bus interface, the CPU cycles inside Emu42 are wrong. In the last case you have the problem that the same opcode needs more cycles for a memory access and even more, the same opcode may have different cycles when the opcode is executed on an even or on an odd address.

But was this mean in the case of the HP32SII? Both RAM and ROM are internal devices directly connected to the Saturn bus. So the used CPU cycles should be correct. As result I assume a CPU strobe frequency of about 884 kHz for the HP32SII now.