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HP-45 Internal Pointer Operations
04-24-2023, 10:58 PM (This post was last modified: 04-25-2023 05:26 PM by brouhaha.)
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RE: HP-45 Internal Pointer Operations
EDIT: With regard to the Classic series models including the HP-45, using the ARC & CTC chips, what I originally posted here was WRONG, and only applies to the later generation processsors (ACT in Woodstock, Spice, and Nut in 41C and Voyagers). Teenix posted the correct information. I have edited the following to hopefully make it clear that the pointer wrapping from 0 to 13 and vice versa does not apply to the Classic series. My apologies for any confusion.

As Teenix said, in the Classic series, P can have values of 14 and 15. Doing a "load constant" under those conditions has no effect.

For the newer HP 56-bit processors:

When p is decremented past 0, or incremented past 13, it wraps. It is never in a stable state of 14 or 15. There are some notes in internal HP docs that the pointer may "disappear" for one cycle when that happens, so executing "p=13; Inc p; lc 6" might give a different C register result than "p=13; inc p; nop; lc 6", but both result in p being 0. In the cycle immediately after the wrap, pointer comparisons can also be wonky, e.g. "p=13; Inc p; ?p=0" may give carry clear even though "p=13; Inc p; nop; ?p=0" gives carry set. The exact behavior has subtle variations depending on which generation of CPU is used, ACT,or Nut.

The programmable models in the Woodstock and later series, including the 67, very much depend on the wrap from 13 to 0, and vice versa, rather than going through 14 and 15. This is especially evident in the label search loops, which were highly optimized for speed.
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RE: HP-45 Internal Pointer Operations - brouhaha - 04-24-2023 10:58 PM



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