HHP-32k 41C ROM Emulator - Dip switches?

[PeterP]

(12-06-2017 10:35 PM)jebem Wrote:  Interesting subject. Thanks for sharing.
So I spent a couple of hours reading the available information on these HHP ROM emulator modules and comparing with the official HP 41C information.

In order to talk to the 41C, the I/O protocol must be followed as specified in the 41C Service Guide.
And one needs to understand how the HHP-16K is mapping its external EPROM memory space into the 41C ROM address space.

The 41C ROM address space consists of 64K addresses segmented in 16 blocks of 4K addresses each. These ROM address blocks are identified from 0 to 15.

For simplicity, let us say that ROM address blocks 0 to 7 are reserved for system and peripherals.

This leaves address blocks 8 to 15 with a maximum total of 32K addresses available to be mapped by the HHP-16K module.

Each 41C ROM address uses a 10-bit data word length.

This means that the HHP-16K must use more than one single 27xx EPROM 8-bit data word to present a 10-bit data word to the 41C.

And indeed the HHP-16K Setup Instructions from TOS site are very precise despite hiding some details concerning how the 10-bit data word is split between two EPROMs.
This information is found here , here and here.


EPROM ZIF sockets:

- The two bigger 28-pin DIP ZIF sockets marked as L8-2 and L8-1, hold the ROM data bits 0 to 7.
One or two EPROMs can be used here depending on the required size.
If two EPROMs are used they will be addressed sequentially.

- The smaller 24-pin DIP ZIF socket marked as U2 hold the ROM data bits 8 and 9.
Here the EPROMs will have smaller size than on the two L8 sockets (24-pin versus 28-pin EPROMs).
This apparently do not make sense because the ROM address space should be the same for the L8 and U2 ROMs assuming they are in parallel to build the 10-bit data words.
But the explanation is found elsewhere in the HHP manual and on the links above:
Each 4 groups of 2-bit are packed into a single 8-bit data word per ROM address.
The HP SDS-IT custom ROM development system could be used to pack.
It seems these packing program tools are called EPROM.EXE and HIGHLOW.EXE.


DIP Switches:

HHP-16K uses two DIP 4-switches, one to set the starting block address for the installed EPROM size, and the another to set the EPROM total size and configuration.

- The DIP 4-switches closer to the ZIP socket U2 (the smaller of the three) sets EPROM total size and configuration.
The same size can be achieved by a single EPROM or a combination of two EPROMS in the L8 ZIF sockets.

- The DIP 4-switches located between two DIP 14-pin CMOS IC's set the starting block address to map the EPROMs.


Now, HHP-16K states that in order to obtain a 16K address space, a 2732 EPROM must be used in the ZIF socket U2, and two 2764 EPROMs in ZIF sockets L8.

Let us see, two 2764 gives us a total of 16K address of 8-bit data words each.
The 2732 gives us 4 K addresses with 8-bit data words each.
So a total of 4k * 8 = 32Kbit, which divided by two (to hold bits 8 and 9) gives us exactly 16K "addresses" with 2-bit data words each.
This seems right to me.


Concerning the HHP-32K:

What do we see in the HHP-32K published picture in post 1?
A 2732 EPROM in the ZIF socket U2.
So this HHP-32K is installed with an unknown application that takes no more than 16K addresses, meaning that it could be installed on a HHP-16K.

I agree with Dave that the daughterboard (piggyback mounted) labeled "HHP-12KBS Bank Mod." contains additional logic to support a double address ROM space, up to the 32K maximum addresses supported by the 41C.

My guess is that in order to install an application with 32K addresses, we would need to use:
- One 2764 EPROM on the U2 position;
- Two 27128 EPROMs on the L8 positions (or one 27256 in one of the L8 positions, if supported).


As for the DIP switches, that's the big unknown.

- The DIP switch located between two DIP 14-pin CMOS IC's that sets the starting block address to map the EPROMs could use the same table as used for the HHP-16K.

- The additional third DIP switch probably complements the original DIP switch (close to the U2 ZIF socket) to set additional EPROM configuration sizes without the need to remap the hardware configuration in the motherboard.

With a bit of luck, the solution could be found with some basic reverse engineering, by dismantling the unit to have access to both PCB's (front and back sides) and write down the schematic diagram for analysis.

Wow, that's quite detailed and lots of ideas! Let me see if I can figure something out (or dismantle and post pictures) Thank you!!