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HP Forum Archive 21

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HP-71B - thanks to Marcus von Cube for MATH ROM article
Message #1 Posted by Michael Lopez on 3 Mar 2013, 1:28 a.m.

Hi Marcus,

I'd like to publically thank you for the excellent article on creating a MATH RAM ( http://www.hpmuseum.org/cgi-sys/cgiwrap/hpmuseum/articles.cgi?read=908 0) on the HP 71B.

As a newcomer to these portable computers, I was toying with the idea of purchasing an old MATH ROM but it was much more sensible for me to purchase some additional RAM instead of paying the exhorbitant prices some buyers are asking for these old ROM modules.

Followed your instructions & installed the modified ROM image in RAM (instead of a dedicated port) & all works perfectly :-).

Now I wonder if anyone else has done something similar with the HP 41 Translator ROM or some of the others?

Thanks again & kind regards,

Michael

      
Re: HP-71B - thanks to Marcus von Cube for MATH ROM article
Message #2 Posted by Harald on 3 Mar 2013, 6:58 a.m.,
in response to message #1 by Michael Lopez

Since I don't have a HP-IL module, and also don't intend to get one, I started wondering if it is possible to make a dedicated Math Rom. Or even better, something like a Clonix Module for the HP71B. Is there any documentation on the ports available?

            
Re: HP-71B - thanks to Marcus von Cube for MATH ROM article
Message #3 Posted by Paul Berger (Canada) on 3 Mar 2013, 7:19 a.m.,
in response to message #2 by Harald

The full internal design spec was released a NOMAS documentation and is available on the MoHPC DVDs. The hardware spec is very detailed and even includes drawings of the edge connectors. The card reader port is likely the easiest place to to connect to and has all the signals you need to connect RAM and/or ROM. It is possible to build such a ROM in fact there is one person working on such a project, search the archives for FRAM71. The biggest hurdle in interfacing to the 71's bus is the way addressing is done, addresses are clocked out as 5 sequential nibbles, and the memory devices are obliged to keep track of it because the CPU may then do a number of reads or writes without sending out a new address, the memory device has to increment its saved address after each bus cycle. I plan to build memory devices for the 71 some time but have not got to it yet.

Edited: 3 Mar 2013, 7:22 a.m.


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