|Re: What is effectively new in uP architecture?, |
Message #3 Posted by Bill Wiese on 11 Dec 2002, 2:26 p.m.,
in response to message #2 by Vieira, Luiz C. (Brazil)
Von Neumann, Harvard, RISC vs CISC concepts etc. have all been around for a long time. Even VLIW concept (very long instruction word) has been around for awhile: there are custom machines where coding is done at the wide-microcode level for parallelism.
On high-end CPUs (Pentiums, etc.) you're going to see more execution units, things like Intel's hyperthreading, etc.
You'll prob see extensions to vector-math hardware like MMX (or AltiVec on PowerPC) for more/better/faster math parallelism.
Low-end CPUs/microcontrollers will evolve more by integration with peripherals (onboard flash, more RAM or DRAM, peripherals, etc.) But as overall market grows there will still be huge need for 4- and 8-bit micros.
You might see more regular micros 16 bit and about having some DSP (digital signal processing) features included. Processors w/DSP capabilities offer both saturating or unsaturating (regular) arithmetic, a fast multiplier, and some of the following: fused multiply-accumulate, zero-overhead looping, bit-reversed indexing for FFT speedups, etc.
San Jose, CA