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FPGA Based Classic HP Core
03-29-2014, 08:52 PM
Post: #1
FPGA Based Classic HP Core
Over in this thread I mentioned a FPGA design I did which implemented a Classic HP calculator's (HP-35, HP-45, HP55,...) hardware. I promised in the thread I'll explain my design in more detail in this forum. So, here is an introduction to my FPGA project:

After lurking here for a long time, I got interested in how HP designed the insides of their early calculators. I researched sites like this one (specifically: HP Calculator Opcode Map), Jacques Laporte site (great info on how the HP-35 calculator works), and Eric Smith's nonpareil HP calculator site (and others I'm forgetting). I though it would be fun to design a FPGA core from scratch that would be functionally equivalent to a classic HP "CPU" -- yes, I think things like this are fun (even after doing FPGA/ASIC design work for a living for the past 15 years).

I did the design in VHDL and targeted a Xilinx Spartan 3 FPGA device. It took about 4 months, last year, to finish (I only worked on it during my fleeting spare time).

This is the hardware I used:
  • FPGA Hobby Board: I used the Papilio FPGA Platform - specifically a Papilio One 250K development board. This board uses has a Xilinx Spartan 3E FPGA chip (a XC3S250E) - not the biggest FPGA but its inexpensive and has plenty of resources for this project.
  • 16 Digit Seven Segment LED Display: This display uses a Titan Micro TM1640 IC. I bought mine from DealExtreme but do a Google search for "TM1640 LED Board" and you will find many suppliers. This is a great display board for a DIY calculator but it is not pocket-calculator-size -- more like desktop-calculator-size. It has a simple to use I2C like interface.
  • PS/2 Keyboard: You know, the standard PC keyboards before USB versions took over.
So, the LED display was my output, the PS/2 was input (in place of a keypad) and the FPGA board did all the "magic".
Here is a picture of the setup:
   
Sorry, its not the best picture; I'll try and get better pictures soon. (I hope the picture shows up in the post -- it does not show in the preview.)

Some of other notes:
  • The FPGA Classic HP Core I designed is functional the same as the original calculators (I hope). The FPGA Classic HP Core directly executes the 10-bit op-codes of the original calculators. Do not confuse this with emulating the op-codes (like what the many SW emulators do) -- there is no embedded CPU (i.e. ARM, AVR, MicroBlaze,...) in the design -- there is no SW program running to interpret the HP 10-bit op-codes.
  • I know of the 41CL project (and the 41CL is a real project compared to the "toy" I created). I did not use 41CL design code is a reference -- I wanted the "fun" of designing on my own. Anyway the 41CL project is done in Verilog -- I only speak VHDL. Smile

The FPGA Classic HP Core (FCHPC) does the actual 10-bit op-code execution. And, there is logic wrapped around the FCHPC that deals with the LED display and the PS/2 keyboard interface. Obviously, the LED display and keyboard are not the same as the original HP hardware and I had to come up with a way to connect modern I/O devices to the FCHPC.
Here is a list of features of the FCHPC:
  • Functionally equivalent to the original HP Calculator "CPU". This means it will execute the original, unchanged, ROM images of the HP-35, HP-45, HP-55,...
  • Not timing equivalent to the original HP Calculator "CPU". This means it does not execute the 10-bit opcodes in the same time as the original calculators. The FCHPC executes each op-code in far fewer clock cycles. (Plus, in a modern FPGA the FCHPC can run at much higher clock rates then the original calculators.)
  • Written in VHDL and tested in a Xilinx Spartan 3 FPGA. Targeting other FPGAs should not be an issue. I avoided using Xilinx FPGA specific features and using Xilinx's CoreGen tool -- logic is inferred from VHDL as much as possible. (Warning: That last statement requires some knowledge of FPGA designing; don't worry if it made no sense to you.)
Here are the features of the logic wrapped around the FCHPC:
  • LED Display driver: Converts the FCHPC current X value into a displayable form. This is different than the original calculator which had to drive the segments of its LED display directly. I used a I2C LED display. The FCHPC has two output ports: the X register (internal to the FCHPC, this is the A register) and the mask register (internally, this is the B register). Using the X and mask registers, the formated LED display output is created.
  • Keyboard Interface: Converts PS/2 serial keyboard scan codes to HP keypad scan codes. This conversion is different for each type of HP calculator.
  • Internal clock generation: Creates the clock that all FPGA logic will use. In this design it is a multiple of 7MHz (currently 28MHz). The reason for 7MHz is its easy to derive a throttling signal for the FCHPC to slow the op-code execution to match a real HP-55. This allows the HP-55's timer mode to be accurate.
  • Two speed modes are available: 1) real mode - the FCHPC executes op-codes at the same rate as an HP-55 and 2) turbo mode - the FCHPC executes op-codes at full speed. The speed of the turbo mode depends on the internal FPGA clock. Currently, at 28MHz, turbo mode is about 1600 times faster than the original HP-55! The speed mode is selected by special keys on the PS/2 keyboard.
  • There are some extra display features supported that did not exist on the original calculators:
    • Indicators for the shift keys. For example, a "F" or "G" is displayed on the far right of the LED display for the HP-55 version when a shift is active.
    • Indicator for the speed mode. This shown in the far right decimal point.
    • Instead of a flashing display for an error condition, the message "-- Error --" is displayed (non-flashing). The original flashing display for an error could not be used in the FPGA version. The flashing was done in the calculator's micro-code (i.e. a SW delay loop). In turbo mode, the flashing would be too fast to see!

In a future posts, I'll dig into the details of the FCHPC and the outer logic that handles the I/O. I'm not sure how much detail people want to see -- I could easily get into serious nerdy digital design stuff and this could bore anyone without FPGA/ASIC design experience.
Please, post your comments/questions and I'll tailor my future posts accordingly.

And, yes, I plan to make available the VHDL source code on github. I'm working on adding and cleaning up comments in the code, now. I'll upload the project to github soon and I'll post when its available.

I now realize I'm a better digital designer than a tech writer; so, I hope this post was not too disjointed or rambling.

Brian
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03-29-2014, 10:04 PM (This post was last modified: 03-30-2014 03:50 AM by Steve Simpkin.)
Post: #2
RE: FPGA Based Classic HP Core
Brian,

Extremely cool! I have been developing with Altera FPGAs and CPLDs for the communication boards I design for almost 20 years. Unfortunately I still use AHDL (it was a very attractive language in 1994) and need to move on to a more mainstream language. If you think RPN calculator users are a shrinking minority, you should see how many people still use AHDL (Altera Hardware Description Language). I may be the last one.

Being an avid HP RPN calculator fan and an FPGA designer, I would love to hear more details of your design.

Steve
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03-30-2014, 02:04 AM
Post: #3
RE: FPGA Based Classic HP Core
I did a tiny bit of FPGA design (decades ago), and yes, I'd love to hear more.
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03-31-2014, 01:02 AM
Post: #4
RE: FPGA Based Classic HP Core
(03-29-2014 08:52 PM)bkn42 Wrote:  Over in this thread I mentioned a FPGA design I did which implemented a Classic HP calculator's (HP-35, HP-45, HP55,...) hardware. I promised in the thread I'll explain my design in more detail in this forum. So, here is an introduction to my FPGA project:
.....
I now realize I'm a better digital designer than a tech writer; so, I hope this post was not too disjointed or rambling.

Brian

Brian, This is very cool. I will be reading your posts on this.
Thanks,
And thanks for posting the VHDL code for it as well.

Shawn
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03-31-2014, 04:59 AM
Post: #5
RE: FPGA Based Classic HP Core
Glad to see the interest in my FPGA project. I've been working on adding comments to the VHDL source code. This is taking longer than I thought -- guess I should have commented more back when I wrote it! I'll probably just post the code soon on github and update the files with comments as I get to them. This will let people peruse the VHDL code, sooner.

Brian
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03-31-2014, 06:38 AM
Post: #6
RE: FPGA Based Classic HP Core
Thanks for sharing your source code!
I have had some experience of VHDL / ASIC design several years ago and it will be interesting to look again to VHDL.
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03-31-2014, 07:15 AM
Post: #7
RE: FPGA Based Classic HP Core
So cool! Do you recommend papillo to learn fpga? What IDE do you use to code?

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03-31-2014, 07:30 PM (This post was last modified: 03-31-2014 07:33 PM by bkn42.)
Post: #8
RE: FPGA Based Classic HP Core
(03-31-2014 07:15 AM)eried Wrote:  So cool! Do you recommend papillo to learn fpga? What IDE do you use to code?

I really like the Papillo boards - I have the Spartan 3E (250k version) and the Spartan 6 boards. They are cheap with most of the FPGA's I/O connected to headers for easy access. Also, you don't need a sperate programming "pod" -- the Papillo boards have a USB to dual-serial interface. One serial interface to used to program the FPGA and the other can be used by your logic as a standard UART.

I use Xilinx's ISE WebPACK software for my hobby FPGA design work -- its impressive for free. (I'm using version 13.4 -- not the latest.) This includes an IDE that's good and I would recommend it for beginners. However, I don't use the IDE; I prefer to use the FPGA build tools via command line (and with make files). Also, I prefer to use my favorite text editor over ISE IDE's editor (although, its not a bad text editor -- I'm just not used to it).

Brian
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03-31-2014, 07:42 PM (This post was last modified: 03-31-2014 07:44 PM by Thomas Klemm.)
Post: #9
RE: FPGA Based Classic HP Core
(03-29-2014 08:52 PM)bkn42 Wrote:  Here is a picture of the setup:
[Image: attachment.php?aid=421]
Sorry, its not the best picture; I'll try and get better pictures soon. (I hope the picture shows up in the post -- it does not show in the preview.)
You have to attach the picture and only when you post it the id (here 421) is created. Then you have to edit your post to include it as an image.

Quote:I now realize I'm a better digital designer than a tech writer; so, I hope this post was not too disjointed or rambling.
Not at all! Thanks a lot for the time you have taken for it. May I suggest to add it to the Articles Forum? So it can be easily found.

Kind regards
Thomas
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03-31-2014, 07:43 PM
Post: #10
RE: FPGA Based Classic HP Core
Nice! I am looking for a beginner pack (like FPGA from zero) that's why I was asking about the IDE (a good reference while you type comes very handy to learn without tutorials)

I will check the source once you publish it, I still don't have a interesting project in mind to make as a first challenge to push my learning. I have seen several chinese xilinx fpga kits but I would prefer something a bit more elaborated like 'Arduino' FPGA.

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03-31-2014, 11:06 PM
Post: #11
RE: FPGA Based Classic HP Core
*Thank you* for describing your project! Having used CPLDs and FPGAs since 1985 (in CUPL, PALASM, ABEL, PHDL, AHDL, VHDL and Verilog), I'm eager to see and learn from your code. Perhaps I can use it to resurrect my first calculator - an HP-25 with a dead ACT chip.

Best always -
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04-01-2014, 05:24 AM
Post: #12
RE: FPGA Based Classic HP Core
(03-31-2014 07:43 PM)eried Wrote:  I will check the source once you publish it, I still don't have a interesting project in mind to make as a first challenge to push my learning. I have seen several chinese xilinx fpga kits but I would prefer something a bit more elaborated like 'Arduino' FPGA.
I have seen these Chinese Xilinx FPGA boards on ebay. They seem to be a good deal; however, I think you will need a programming "pod" -- at least $40 (USD).

(03-31-2014 11:06 PM)Jim Horn Wrote:  *Thank you* for describing your project! Having used CPLDs and FPGAs since 1985 (in CUPL, PALASM, ABEL, PHDL, AHDL, VHDL and Verilog), I'm eager to see and learn from your code. Perhaps I can use it to resurrect my first calculator - an HP-25 with a dead ACT chip.
One of my ideas for a future project is making a Woodstock/Spice FPGA core, using a bad HP-34C but with a good key pad and create a desktop version with a bigger display -- a "franken-HP-34C" that is super fast. Nice to think about but probably many months before I could start something like that.

Brian
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04-01-2014, 05:35 AM
Post: #13
RE: FPGA Based Classic HP Core
Here is one FCHPC feature I forgot to list in my first post:
The LED display I used and even the PS/2 keyboard are optional if don't have those pieces of hardware. The FCHPC also has an UART -- display info is sent to a PC and PC keyboard presses are sent to the FCHPC. So, all you really need is a FPGA board with a UART and you can experiment with the FCHPC (you would miss out on the beautiful retro LED look, however). I have written a very crude tcl/tk GUI to communicate with the FCHPC -- I'll post this too once I clean it up some.

Brian
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04-01-2014, 05:52 AM (This post was last modified: 04-02-2014 12:02 AM by bkn42.)
Post: #14
RE: FPGA Based Classic HP Core
Ok, the project has been pushed to github (<- link to project). All of this is my own code except for the UART and low level PS/2 interface code -- I got these from OpenCores.org.

The tcl/tk GUI I mention before is not there, yet. I still need to clean it up. I'll post it soon.

Please, take a look at the code and ask questions and/or leave comments.

In a posting soon, I'll start describing one of the simpler modules, first: the BCD ALU (files bcd_alu.vhd and bcd_alu_lut_pack.vhd).

Brian
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04-02-2014, 10:11 AM
Post: #15
RE: FPGA Based Classic HP Core
(04-01-2014 05:52 AM)bkn42 Wrote:  Ok, the project has been pushed to github (<- link to project). All of this is my own code except for the UART and low level PS/2 interface code -- I got these from OpenCores.org.

The tcl/tk GUI I mention before is not there, yet. I still need to clean it up. I'll post it soon.

Please, take a look at the code and ask questions and/or leave comments.

In a posting soon, I'll start describing one of the simpler modules, first: the BCD ALU (files bcd_alu.vhd and bcd_alu_lut_pack.vhd).

Brian

Cool! thanks.

On a related matter, what do you think about http://www.ebay.com/itm/XC3S250E-XILINX-...3ccce6549b this kit compared to papilio? I am just looking for a very beginners kit like to make a simple calculator or something like that as a first project.

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04-02-2014, 07:59 PM
Post: #16
RE: FPGA Based Classic HP Core
(04-02-2014 10:11 AM)eried Wrote:  Cool! thanks.

On a related matter, what do you think about http://www.ebay.com/itm/XC3S250E-XILINX-...3ccce6549b this kit compared to papilio? I am just looking for a very beginners kit like to make a simple calculator or something like that as a first project.

I've seen these FPGA boards and I'm very tempted to get one -- seems like you get a lot for your money.

I'm going to refer to the ebay link you posted, specifically the picture of the fpga board, Core3S250E. See items 5 (XCF02S flash) and 14 (JTAG interface connector)? The XCF02S flash holds the FPGA's configuration (i.e. your digital design) and the FPGA is loaded with it on power up. You need a way to program this flash and, unlike the papilio boards, you need to use the JTAG connector to program the flash. You will need to use a JTAG programming "pod" that is compatible with Xilinx's programming software tool. A real Xilinx programming pod is expensive -- about $200, I think. The same seller has this Xilinx compatible programming pod -- you will need something like this.

If you go this route, I would recommend the larger FPGA version, with the XC3S500E FPGA. It would allow you to do more once you get past the basics (like playing with the many available free soft processor cores). However, my HP Calculator Core easily fits in the smaller version.

Brian
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04-03-2014, 03:26 AM
Post: #17
RE: FPGA Based Classic HP Core
(04-02-2014 07:59 PM)bkn42 Wrote:  
(04-02-2014 10:11 AM)eried Wrote:  Cool! thanks.

On a related matter, what do you think about http://www.ebay.com/itm/XC3S250E-XILINX-...3ccce6549b this kit compared to papilio? I am just looking for a very beginners kit like to make a simple calculator or something like that as a first project.

I've seen these FPGA boards and I'm very tempted to get one -- seems like you get a lot for your money.

I'm going to refer to the ebay link you posted, specifically the picture of the fpga board, Core3S250E. See items 5 (XCF02S flash) and 14 (JTAG interface connector)? The XCF02S flash holds the FPGA's configuration (i.e. your digital design) and the FPGA is loaded with it on power up. You need a way to program this flash and, unlike the papilio boards, you need to use the JTAG connector to program the flash. You will need to use a JTAG programming "pod" that is compatible with Xilinx's programming software tool. A real Xilinx programming pod is expensive -- about $200, I think. The same seller has this Xilinx compatible programming pod -- you will need something like this.

If you go this route, I would recommend the larger FPGA version, with the XC3S500E FPGA. It would allow you to do more once you get past the basics (like playing with the many available free soft processor cores). However, my HP Calculator Core easily fits in the smaller version.

Brian

Hehehe I see, good that I asked you, chinese only answer "yes sir, please buy, we appreciate your business mr. #433929". About papilio, is 500k enough? I am just trying to be cheap but not restrictive to learn Big Grin (how about these connector kits, like the arcade, or the segments screen?)

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04-04-2014, 09:18 PM
Post: #18
RE: FPGA Based Classic HP Core
(04-03-2014 03:26 AM)eried Wrote:  Hehehe I see, good that I asked you, chinese only answer "yes sir, please buy, we appreciate your business mr. #433929". About papilio, is 500k enough? I am just trying to be cheap but not restrictive to learn Big Grin (how about these connector kits, like the arcade, or the segments screen?)

I have a Papilio One 250K but I would recommend the Papilio One 500K (or Papilio Pro -- I have one of these, also), if you think you want to get into the embedded processors in the future -- like the ZPUino. However, you can learn a lot with the smaller board. Also, you probably want something like the LogicStart MegaWing so you can play with some simple I/O devices. I don't have one of these boards becuase I have boxes of LED, LCD, VFD displays, switches, connectors, and electronic stuff I've collected over the years that I can use.

Take a look at the Showcase on The Gadget Factory and see what people have done with the different size Papilio boards. This might help you decide on what hardware to buy.

Brian
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04-04-2014, 09:21 PM
Post: #19
RE: FPGA Based Classic HP Core
(03-31-2014 07:42 PM)Thomas Klemm Wrote:  May I suggest to add it to the Articles Forum? So it can be easily found.
Thanks for the idea! I'll try collecting all the technical stuff from this post and create an Article in the future.

Brian
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04-09-2014, 08:29 AM (This post was last modified: 04-09-2014 08:29 AM by HP67.)
Post: #20
RE: FPGA Based Classic HP Core
I wonder why somebody hasn't implemented Saturn in hardware/FPGA etc. and created a hot-rod 50g since the ROMs are available. A 400 MHz 50g might be interesting to compare with the Prime Wink

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