New Yorke chip in hardware
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07-04-2020, 11:31 PM
Post: #1
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New Yorke chip in hardware
Following on from the "New Yorke" thread in the other forum, I wondered how feasible it would be to get Google to make it for us?
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07-05-2020, 12:29 AM
Post: #2
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RE: New Yorke chip in hardware
Perhaps Monte's NEWT microprocessor in the 41CL for starters? Even with the process node and die size restrictions, you should be able to get all of RAM memory, plus perhaps Timer, Printer, and HP-IL peripherals.
I'll take one! Remember kids, "In a democracy, you get the government you deserve." |
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07-15-2020, 09:06 PM
Post: #3
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RE: New Yorke chip in hardware
(07-04-2020 11:31 PM)BruceH Wrote: Following on from the "New Yorke" thread in the other forum, I wondered how feasible it would be to get Google to make it for us? Well, I really don't think Google's offer is worth it. It's *much* easier to use a low power FPGA, such as one from Microchip Technologies or Lattice Semiconductor. With an FPGA you have most of the capabilities of something like a "standard cell" ASIC, but with the ability to re-configure the FPGA to any circuit / netlist you want ( within limits ) without having to actually fab anything. Modern FPGAs are quite powerful and feature rich. Take for example Xilinx : With their "Artix-7" "low power" FPGA family, you get, depending on the model, several Mbits of block and distributed RAM, multiple configurable clock domains with Digital Clock Managers, configurable I/O, DSP functionality via DSP blocks / "slices", and much more. The problem with Xilinx "low power" FPGAs is that Xilinx considers "low power" to be in the ~25 milli-amp range for *quiescent* current draw, not to mention active current draw ![]() ![]() With the Google offering, Google has to *select* your RTL code and it has to be open source. Also, even if they do select your code, it has to be in Git repo ( I prefer SVN ![]() With the Lattice FPGA solution, you get free EDA software ( Lattice Diamond ) and the dev board only costs a little over $100 USD ( of which I have a few ![]() IMHO, Google's offering is just a publicity stunt ![]() Regards, Jonathan Aeternitas modo est. Longa non est, paene nil. |
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07-16-2020, 08:02 AM
Post: #4
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RE: New Yorke chip in hardware
I too am finding it hard to see applicability for my interests in Google's offer of free chips: FPGAs do tick a lot of boxes. It's an attractive offer on the face of it, but I was reminded how very involved and exacting the chip design process is. You'd very likely want to bring up your design on an FPGA before finalising your design anyway.
The very low power Lattice offerings are a good find! Two disadvantages for me: only available in BGA packages, and not 5V tolerant. These are of course minor points, especially for a new standalone calculator-type of application. An advantage (for me) of Lattice's ICE40 range, hopefully including these low power ones: an open source toolchain is available. |
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07-28-2020, 07:45 PM
Post: #5
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RE: New Yorke chip in hardware
(07-16-2020 08:02 AM)EdS2 Wrote: Two disadvantages for me: only available in BGA packages, and not 5V tolerant. These are of course minor points, especially for a new standalone calculator-type of application. Well, this can be easily gotten around by using a small daughterboard and a μC voltage regulator and supervisory IC. The power supplies in eg. the HP48G series and HP48S series and older HP calculators are not only ancient, but not that efficient compared to a modern tiny voltage regulator chip. Quote:An advantage (for me) of Lattice's ICE40 range, hopefully including these low power ones: an open source toolchain is available. Unfortunately ( for me ![]() ![]() ![]() Regards, Jonathan Aeternitas modo est. Longa non est, paene nil. |
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