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Question regarding HP41C Power Up Status circuit
06-13-2018, 06:07 PM (This post was last modified: 06-15-2018 07:02 PM by Jonathan Busby.)
Post: #1
Question regarding HP41C Power Up Status circuit
Well, it's been a long time since I've posted anything here. I think my last post was in early 2003, so that's about 15 years Smile.

To get to the point, I've been looking for a circuit described in the HP41C technical hardware reference manual. Specifically, it's the Power Up Status OR "PUS" circuit in the 1LF6 chip. According to the manual "PUS uses a two threshold detection scheme coupled to a ratioed flip-flop designed to power up in a known state." I'd like to know how this circuit works but the manual says "Refer to the 1LF6 logic diagram for a full PUS circuit schematic." The only problem is that I've done a thorough search and I can't find said schematic. Does anyone know where the schematic is?

Thanks,

Jonathan

Aeternitas modo est. Longa non est, paene nil.
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06-13-2018, 11:48 PM
Post: #2
RE: Question regarding HP41C Power Up Status circuit
The diagram part number is given as E-1LF6-9001-50 in the timer chip detailed description, but a Google search does not turn up any hits.
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06-14-2018, 03:35 AM
Post: #3
RE: Question regarding HP41C Power Up Status circuit
Jonathan,
Welcome back ...
What's that technical hardware reference manual you mention? I can't find anything similar in the museum's DVD contents.
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06-14-2018, 05:01 AM (This post was last modified: 06-14-2018 04:53 PM by Jonathan Busby.)
Post: #4
RE: Question regarding HP41C Power Up Status circuit
(06-14-2018 03:35 AM)AndiGer Wrote:  Jonathan,
Welcome back ...

Thanks and you're welcome! Big Grin

Quote:What's that technical hardware reference manual you mention? I can't find anything similar in the museum's DVD contents.

Sorry for not providing this info in my post. I have version 8.0 of the museum's documents on a USB flash drive. The file is located in the "Service Manuals & Internals" section with a name of "hp41cpu.pdf" and a path of "/data/cd11/intern/hp41cpu.pdf". It's entitled "HP-41C CPU, Display Driver, HP-IL, Data Storage, Timer IC, and Interface IC Specifications" . The portion mentioning the PUS circuit is in section 5.1.6 .

Regards,

Jonathan

Aeternitas modo est. Longa non est, paene nil.
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