FRAM71B

[Sylvain Cote]

(10-08-2016 06:59 AM)Erwin Wrote:  For the DATA-ACQ 64KB module must switched to following example, 'loosing' one port?

Yes, in my last setup proposal, I have reserved at the end a 64KB address space for bank switched modules.
In that space you can either map: (4 x 16KB ROM) or (2 x 32KB ROM) or (1 x 64KB ROM) or (2 x 16KB ROM + 1 x 32KB ROM)

(10-08-2016 06:59 AM)Erwin Wrote:  POKE "C2000","3E4D5D69718191A1BAC50D0" ??? that's not clear for me

First "C2000" should be "2C000"

Second, the configuration you are proposing is not good, the one you should propose is ...

POKE "2C000","D3E4D5D69718191A9B00000000000000" [ENDLINE] // common configuration

Code:

Cg  Chip_#  Addr.     FBlk  Bank  LCIM   Type  Size  Port  Description
--  ------  --------  ----  ----  -----  ----  ----  ----  -------------------------------
D3  Chip_0  2C000/01  3     0     1:yes  ROM   32KB  n/a   Translator-41 HC E0000
E4  Chip_1  2C002/03  4     0     1:yes  ROM   32KB  5.00  Translator-41
D5  Chip_2  2C004/05  5     0     1:yes  ROM   32KB  5.01  Math
D6  Chip_3  2C006/07  6     0     1:yes  ROM   32KB  5.02  JPC
97  Chip_4  2C008/09  7     0     1:yes  IRAM  32KB  5.03  Backup
18  Chip_5  2C00A/0B  8     0     0:no   RAM   32KB  5.04  Main-RAM 128KB Part-1
19  Chip_6  2C00C/0D  9     0     0:no   RAM   32KB  5.04  Main-RAM 128KB Part-2
1A  Chip_7  2C00E/0F  A     0     0:no   RAM   32KB  5.04  Main-RAM 128KB Part-3
9B  Chip_8  2C010/11  B     0     1:yes  RAM   32KB  5.04  Main-RAM 128KB Part-4

Note: I had to reduce the Main-RAM to 128KB because we can only use 15 FRAM Blocks on a FRAM71/B-512 and they are all used here.

Bank 0 : Curve-Fit and AMPI-Stat configuration
Enter (a) complete configuration or (b) configuration change only
a) POKE "2C000","D3E4D5D69718191A9BDCDD0000000000" [ENDLINE]
b) POKE "2C012","DCDD" [ENDLINE]

Code:

Cg  Chip_#  Addr.     FBlk  Bank  LCIM   Type  Size  Port  Description
--  ------  --------  ----  ----  -----  ----  ----  ----  -------------------------------
DC  Chip_9  2C012/13  C     0     1:yes  ROM   32KB  5.05  Curve-Fit 32KB ROM
DD  Chip_A  2C014/15  D     0     1:yes  ROM   32KB  5.06  AMPI-Stat 32KB ROM

Bank 1 : (Text-Editor or Circuit) and Finance configuration
Enter (a) complete configuration or (b) configuration change only
a) POKE "2C000","D3E4D5D69718191A9BEEEF0000000000" [ENDLINE]
b) POKE "2C012","EEEF" [ENDLINE]

Code:

Cg  Chip_#  Addr.     FBlk  Bank  LCIM   Type  Size  Port  Description
--  ------  --------  ----  ----  -----  ----  ----  ----  -------------------------------
EE  Chip_9  2C012/13  E     1     1:yes  ROM   16KB  5.05  Text-Editor or Circuit 16KB ROM
EF  Chip_A  2C014/15  F     1     1:yes  ROM   16KB  5.06  Finance 16KB ROM

Bank 2 : Data-Acq configuration
Enter (a) complete configuration or (b) configuration change only
a) POKE "2C000","D3E4D5D69718191A9B50D10000000000" [ENDLINE]
b) POKE "2C012","50D1" [ENDLINE]

Code:

Cg  Chip_#  Addr.     FBlk  Bank  LCIM   Type  Size  Port  Description
--  ------  --------  ----  ----  -----  ----  ----  ----  -------------------------------
50  Chip_9  2C012/13  0     2     0:no   ROM   32KB  5.05  Data-Acq 64KB ROM Part-1
D1  Chip_A  2C014/15  1     2     1:yes  ROM   32KB  5.05  Data-Acq 64KB ROM Part-2

Please take the time to read carefully the
FRAM71B User's Manual Page 14 section LCIM (Last Chip In Module)
and
Nathan article section "Electrical Behavior of Devices" on chips and modules

Sylvain

edit: typo