New Yorke chip in hardware
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07-15-2020, 09:06 PM
Post: #3
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RE: New Yorke chip in hardware
(07-04-2020 11:31 PM)BruceH Wrote: Following on from the "New Yorke" thread in the other forum, I wondered how feasible it would be to get Google to make it for us? Well, I really don't think Google's offer is worth it. It's *much* easier to use a low power FPGA, such as one from Microchip Technologies or Lattice Semiconductor. With an FPGA you have most of the capabilities of something like a "standard cell" ASIC, but with the ability to re-configure the FPGA to any circuit / netlist you want ( within limits ) without having to actually fab anything. Modern FPGAs are quite powerful and feature rich. Take for example Xilinx : With their "Artix-7" "low power" FPGA family, you get, depending on the model, several Mbits of block and distributed RAM, multiple configurable clock domains with Digital Clock Managers, configurable I/O, DSP functionality via DSP blocks / "slices", and much more. The problem with Xilinx "low power" FPGAs is that Xilinx considers "low power" to be in the ~25 milli-amp range for *quiescent* current draw, not to mention active current draw ![]() ![]() With the Google offering, Google has to *select* your RTL code and it has to be open source. Also, even if they do select your code, it has to be in Git repo ( I prefer SVN ![]() With the Lattice FPGA solution, you get free EDA software ( Lattice Diamond ) and the dev board only costs a little over $100 USD ( of which I have a few ![]() IMHO, Google's offering is just a publicity stunt ![]() Regards, Jonathan Aeternitas modo est. Longa non est, paene nil. |
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Messages In This Thread |
New Yorke chip in hardware - BruceH - 07-04-2020, 11:31 PM
RE: New Yorke chip in hardware - mfleming - 07-05-2020, 12:29 AM
RE: New Yorke chip in hardware - Jonathan Busby - 07-15-2020 09:06 PM
RE: New Yorke chip in hardware - EdS2 - 07-16-2020, 08:02 AM
RE: New Yorke chip in hardware - Jonathan Busby - 07-28-2020, 07:45 PM
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