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41CL Maximum registers for DATA/PROGS storage
07-20-2018, 11:12 PM (This post was last modified: 07-20-2018 11:20 PM by Sylvain Cote.)
Post: #13
RE: 41CL Maximum registers for DATA/PROGS storage
(07-20-2018 01:26 PM)CY-CL Wrote:  
Quote:Flash does not work like RAM, I am at the office right now and cannot give you the exact procedure but here is the pseudo code that you need to do.
It is not urgent, when you can provide me later an example, how exactly copy Flash to RAM, it would be great.

There are several ways to do it.

The easiest way is to use the 41CL Update Function module (YUPS), but unfortunately it has the same XROM ID (31) as the RAMBox ROM.
A way to solve this, is to map the YUPS ROM at the same page as the RM32 ROM.
I will assume the following ...
  • MMU is enabled
  • YFNX is mapped somewhere
  • RM32 is mapped at page 9
  • WW Container is mapped somewhere
  • WW Container is at RAM address 830 (based on your previous message)
  • you want to save the WW Container to Flash address 1FE (based on your previous message)
Note: if you have a v5 board, I would suggest to use one of the unused top Flash sector (ex: 3F0 or 3F8)

The update procedure ...
command                     description
"YUPS 9"                    deactivate RAMBox ROM and activate 41CL Update Function ROM
PPLUG                       activate mapping
"1F8"                       1FE is part of Flash sector 1F8..1FF, so we need to specify the start address 1F8
P8BFR                       copy flash sector (1F8..1FF) to RAM buffer (810..817)
"830>816"                   copy content of RAM 830 to RAM 816 who will be copied to 1FE later on
PGCPY                       do RAM to RAM page copy
"1F8"                       flash sector start address to erase
P8ERASE                     erase flash sector
"1F8"                       destination flash sector start address
P8UPD                       copy RAM buffer (810..817) to flash sector (1F8..1FF)
"RM32 9"                    deactivate 41CL Update Function ROM and activate RAMBox ROM
PPLUG                       activate mapping


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RE: 41CL Maximum registers for DATA/PROGS storage - Sylvain Cote - 07-20-2018 11:12 PM

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