ACT available

[brouhaha]

I'm not convinced that you have an accurate model of how the instruction works.

My understanding based both on hardware experimentation and on study of the firmware of various models is that the clear data regs instruction (octal 1260) always clears all of the data registers in the selected 16-register group (i.e., all registers whose address ignoring the low four bits is equal to the selected address. It works that way whether the chip is PMOS, NMOS, or CMOS. It definitely does not clear all the registers when there are multiple 16-register chips; it only clears the selected one. Two details I'm not entirely certain of:

• Does the 1260 instruction clear a complete 16 registers-group when they are implemented in two 8-register chips?
• Does the 1260 instruction clear all 32-registers of a 32-register group? I'm fairly certain that it does not.
  

In the 29C, the firmware at address 6331 explicitly does a clear with address 0x10 selected, if it has detected that the cold-start constant (BCD 34934284) is not present in the status register (0x2e). I believe this clears only the registers from 0x10 through 0x1f. If the instruction was incorrectly implemented and cleared all RAM, or cleared the entire CMOS RAM chip (0x10 through 0x2f), it would wipe out the cold-start constant that it has just written (at address 6324) into the status register, which is why it would clear that RAM at every power-up.

On the other hand, if the instruction was implemented to not EVER clear the CMOS RAM chip, it would cause problems on a true cold start, leaving garbage behind. (Possibly not causing any actual problem in your simulation code if you zero all registers on a true cold start.)