Before going into Podalirius specific request and in order to understand what is going on, I will do some 41CL MMU space exploration
References:
- Manual.: 41CL User Manual (sy41cl.pdf, YFNZ & YFNP)
Chapter: Memory Management (P.62) / Fncs: MMUEN, MMUDIS, YRES, PLUGH, PLUG1L
.
- Manual.: 41CL Extreme Functions (cl_extreme.pdf, YFNX)
Chapter: MMU Functions (P.8) / Fncs: MMUCLP, MMUCLS
.
- Manual.: 41CL Memory Functions (cl_memory.pdf, YFNF)
Chapter: Address Pointer Functions (P.6) / Fncs: STOXP
Chapter: General Memory Functions (P.12) / Fncs: YPEEK+
Chapter: Configuration Functions (P.32) / Fncs: CFGINI
.
- Manual.: 41CL Memory Reference (mem_ref.pdf)
Chapter: RAM Memory Details (P.28 @ P.31)
First, we need to do the basic setup
Code:
MMUDIS // disable MMU
MMUCLR // clear MMU configuration
"YFNX"
PLUGH // plug 41CL Extreme Functions into port 7
"YFNF"
PLUG1L // plug 41CL Memory Functions into port 8
TURBO50 // fast mode
MMUEN // enable MMU
Before doing the exploration, we need to do some cleanup ...
Code:
MMUCLS // Clear Secondary MMU Registers (0x804100..0x8043FF)
MMUCLP // Clear Primary MMU Registers (0x804000..0x8040FF)
CAT 2 // Oups we lost our current MMU mapping
YRES // Recovery, same as MMUDIS, part of "-CL TIME" module
Well, we need to redo the basic setup but skip the cleaning part, already done
Code:
"YFNX"
PLUGH // plug 41CL Extreme Functions into port 7
"YFNF"
PLUG1L // plug 41CL Memory Functions into port 8
MMUEN // enable MMU
To speedup things we will assign some functions to the user keys
Code:
ASN "STOXP" 15 // assign STOXP to LN key
ASN "YPEEK+" 25 // assign YPEEK+ to TAN key
USER // activate USER mode
First question: where is the YFNX and YFNF mapping stored ?
Lets do some basic exploration in MMU space
Code:
"804060"
STOPXP (LN key) // store memory address where we start looking into the primary MMU registers.
Code:
YPEEK+ (TAN key) // 806060-0000 : Page 6 : Bank 1 : Set 0 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806061-0000 : Page 6 : Bank 1 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806062-0000 : Page 6 : Bank 1 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806063-0000 : Page 6 : Bank 1 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 806064-0000 : Page 6 : Bank 3 : Set 0 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806065-0000 : Page 6 : Bank 3 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806066-0000 : Page 6 : Bank 3 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806067-0000 : Page 6 : Bank 3 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 806068-0000 : Page 6 : Bank 2 : Set 0 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806069-0000 : Page 6 : Bank 2 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80606A-0000 : Page 6 : Bank 2 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80606B-0000 : Page 6 : Bank 2 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 80606C-0000 : Page 6 : Bank 4 : Set 0 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80606D-0000 : Page 6 : Bank 4 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80606E-0000 : Page 6 : Bank 4 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80606F-0000 : Page 6 : Bank 4 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 806070-800A : Page 7 : Bank 1 : Set 0 : enabled : unlocked : no-multi : mapped to 0x00A YFNX
YPEEK+ (TAN key) // 806071-0000 : Page 7 : Bank 1 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806072-0000 : Page 7 : Bank 1 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806073-0000 : Page 7 : Bank 1 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 806074-800A : Page 7 : Bank 3 : Set 0 : enabled : unlocked : no-multi : mapped to 0x00A YFNX
YPEEK+ (TAN key) // 806075-0000 : Page 7 : Bank 3 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806076-0000 : Page 7 : Bank 3 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806077-0000 : Page 7 : Bank 3 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 806078-800A : Page 7 : Bank 2 : Set 0 : enabled : unlocked : no-multi : mapped to 0x00A YFNX
YPEEK+ (TAN key) // 806079-0000 : Page 7 : Bank 2 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80607A-0000 : Page 7 : Bank 2 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80607B-0000 : Page 7 : Bank 2 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 80607C-800A : Page 7 : Bank 4 : Set 0 : enabled : unlocked : no-multi : mapped to 0x00A YFNX
YPEEK+ (TAN key) // 80607D-0000 : Page 7 : Bank 4 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80607E-0000 : Page 7 : Bank 4 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80607F-0000 : Page 7 : Bank 4 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 806080-8167 : Page 7 : Bank 1 : Set 0 : enabled : unlocked : no-multi : mapped to 0x167 YFNF
YPEEK+ (TAN key) // 806081-0000 : Page 7 : Bank 1 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806082-0000 : Page 7 : Bank 1 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806083-0000 : Page 7 : Bank 1 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 806084-8167 : Page 7 : Bank 3 : Set 0 : enabled : unlocked : no-multi : mapped to 0x167 YFNF
YPEEK+ (TAN key) // 806085-0000 : Page 7 : Bank 3 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806086-0000 : Page 7 : Bank 3 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806087-0000 : Page 7 : Bank 3 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 806088-8167 : Page 7 : Bank 2 : Set 0 : enabled : unlocked : no-multi : mapped to 0x167 YFNF
YPEEK+ (TAN key) // 806089-0000 : Page 7 : Bank 2 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80608A-0000 : Page 7 : Bank 2 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80608B-0000 : Page 7 : Bank 2 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
YPEEK+ (TAN key) // 80608C-8167 : Page 7 : Bank 4 : Set 0 : enabled : unlocked : no-multi : mapped to 0x167 YFNF
YPEEK+ (TAN key) // 80608D-0000 : Page 7 : Bank 4 : Set 1 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80608E-0000 : Page 7 : Bank 4 : Set 2 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 80608F-0000 : Page 7 : Bank 4 : Set 3 : disabled : unlocked : no-multi : no-mapping
Code:
we stop here for now because everything else is set to 0000
From the above trace, we have found where PLUGH and PLUG1L put its mapping information, meaning SET 0 which is the default environment and in all banks of the specific page.
Second question: what does the CFGINI do ?
From Monte manual: Executing CFGINI (Initialize Alternate Configurations) loads twelve of the alternate configurations ...
ok, but where can I see this for myself !!!
Previously we have cleaned that memory space with MMUCLS, so we should see only 0000 everywhere, let's see
Code:
"804140"
STOPXP (LN key) // store memory address of page 4 of the secondary MMU registers, set 4 to 7.
Code:
YPEEK+ (TAN key) // 806140-0000 : Page 4 : Bank 1 : Set 4 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806141-0000 : Page 4 : Bank 1 : Set 5 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806142-0000 : Page 4 : Bank 1 : Set 6 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806143-0000 : Page 4 : Bank 1 : Set 7 : disabled : unlocked : no-multi : no-mapping
Code:
"804190"
STOPXP (LN key) // store memory address of page 9 of the secondary MMU registers, set 4 to 7.
Code:
YPEEK+ (TAN key) // 806190-0000 : Page 9 : Bank 1 : Set 4 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806191-0000 : Page 9 : Bank 1 : Set 5 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806192-0000 : Page 9 : Bank 1 : Set 6 : disabled : unlocked : no-multi : no-mapping
YPEEK+ (TAN key) // 806193-0000 : Page 9 : Bank 1 : Set 7 : disabled : unlocked : no-multi : no-mapping
... at that point we have confirmed that everything is set to zero.
Lets load the configuration tables from ROM with CFGINI
Code:
CFGINI // load configuration table from ROM to RAM
Lets do some validation, you need to validate this with cl_memory.pdf page 32
Code:
"804140"
STOPXP (LN key) // store memory address of page 4 of the secondary MMU registers, set 4 to 7.
Code:
YPEEK+ (TAN key) // 806140-8120 : Page 4 : Bank 1 : Set 4 : enabled : unlocked : no-multi : mapped to 0x120 4LIB config 9PWR
YPEEK+ (TAN key) // 806141-8120 : Page 4 : Bank 1 : Set 5 : enabled : unlocked : no-multi : mapped to 0x120 4LIB config 9MTH
YPEEK+ (TAN key) // 806142-8120 : Page 4 : Bank 1 : Set 6 : enabled : unlocked : no-multi : mapped to 0x120 4LIB config 9SCI
YPEEK+ (TAN key) // 806143-8120 : Page 4 : Bank 1 : Set 7 : enabled : unlocked : no-multi : mapped to 0x120 4LIB config 9INF
Code:
"804190"
STOPXP (LN key) // store memory address of page 9 of the secondary MMU registers, set 4 to 7.
Code:
YPEEK+ (TAN key) // 806190-81B8 : Page 9 : Bank 1 : Set 4 : enabled : unlocked : no-multi : mapped to 0x1B8 WARP config 9PWR (WARP:WARPB1)
YPEEK+ (TAN key) // 806191-A1A4 : Page 9 : Bank 1 : Set 5 : enabled : unlocked : multi-lp : mapped to 0x1A4 SM44 config 9MTH (SM44:HLMAT41) (multi last page)
YPEEK+ (TAN key) // 806192-80D6 : Page 9 : Bank 1 : Set 6 : enabled : unlocked : no-multi : mapped to 0x0D6 ISOL config 9SCI
YPEEK+ (TAN key) // 806193-81DB : Page 9 : Bank 1 : Set 7 : enabled : unlocked : no-multi : mapped to 0x1DB CRTO config 9INF
... at that point we have confirmed that the secondary MMU registers does contains the table data described in the cl_memory.pdf document page 32.
It is 01h30 here, I am going to bed, follow-up tomorrow ...
edit: typo
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(SOLVED) 41CL - DOUBLE HEPAX ACCESS and MMU CONFIG
