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HP vs TI Indirect Addressing. - Matt Agajanian - 07-28-2022 06:49 PM
From the get-go, the SR-52 was able to use any register for indirect addressing. Since the HP-67 and following fully programmable models had indirect addressing functionality, I know. Why didn't HP follow suit and feature indirect addressing using any register for cals starting with the 67? Yeah, the 41 & 42 indirect addressing could use any register.
RE: HP vs TI Indirect Addressing. - David Hayden - 07-28-2022 09:56 PM
Weren't instructions a fixed number of bits before the 41C? That means there were only a small number of instructions possible. Adding STO, RCL, GTO and GSB to any of 20 registers would take up 80 instructions. If each was 8 bits, that's a really big chunk. I think they rightly decided that a small number of indirect registers was a better use of instructions.
Just my guess.
Dave
RE: HP vs TI Indirect Addressing. - pauln - 07-29-2022 12:53 AM
(07-28-2022 09:56 PM)David Hayden Wrote: Weren't instructions a fixed number of bits before the 41C?
That would be my guess too. As we know, an advantage of the HP-67 over the TI SR-52 was that instructions were fully merged.
Also, one indirect register was probably all you needed for most programs.
By the way, was the SR-52 the first programmable handheld with indirect addressing? I'm trying to get a mental picture of these early calculators. Another claim to fame for the TI SR-52 would be that it was the first that one could attach to a printer (?).
RE: HP vs TI Indirect Addressing. - Dave Britten - 07-29-2022 01:18 PM
I agree that it's probably because of the fixed instruction sizes on the 65 (6 bits), 67/97 (1 byte), 11C (1 byte), 29C/19C (1 byte?), etc. (Interestingly, the 15C does have some two-byte instructions, but it still has a dedicated indirect address register.)
If I'm remembering correctly, the TI-59 could take this to ridiculous extremes with INV DSZ IND XX IND YY, which would be "decrement the indirect register specified in register XX, and branch indirectly to the step specified in register YY on zero". A whopping SIX bytes/steps for one program instruction! So TI might have been wasteful with memory having so many unmerged instructions, but it did offer some interesting flexibility such as this.