As we know, the processor clock of the HP48 has a bit of apparent variability. The hardware multiplies the installed 32.768kHz crystal to about 4MHz. (one finds this when doing the <ON><D>A test.
Has anybody studied or understood the source of this variability?
It is either due to:
1. The precision of the installed 32.768 kHz crystal.
2. The code that produces the apparent clock frequency.
3. The accuracy of the PLL that performs the multiplication of the crystal frequency.
4. Other source?
While I suspect it is 3, it would be nice if it is 1, then a replacement of the crystal would solve this variability.
TIA,
TomC
Hello Massimo:
Thanks for your reply.
While there may be long term variability due to temperature, the variability I am referring to is the short term variability one can see doing the <ON><D> testing.
Regards,
TomC
(02-06-2021 02:20 PM)Massimo Gnerucci Wrote: [ -> ]Temperature?
I once heard that HP intentionally engineered some kind of "jitter" into the clock circuitry to prevent the generation of a single frequency of RF noise. If the emitted noise has a wider bandwidth, it's easier to pass the FCC regulations... or some such thing. I have no idea if that's true, or if it even makes sense. Just sharing something I heard once upon a time.
Thanks Joe... that's a possibility I hadn't considered...
TomC
(02-07-2021 11:57 PM)Joe Horn Wrote: [ -> ]I once heard that HP intentionally engineered some kind of "jitter" into the clock circuitry to prevent the generation of a single frequency of RF noise. If the emitted noise has a wider bandwidth, it's easier to pass the FCC regulations... or some such thing. I have no idea if that's true, or if it even makes sense. Just sharing something I heard once upon a time.
(02-06-2021 01:43 PM)TomC Wrote: [ -> ]As we know, the processor clock of the HP48 has a bit of apparent variability. The hardware multiplies the installed 32.768kHz crystal to about 4MHz. (one finds this when doing the <ON><D>A test.
Has anybody studied or understood the source of this variability?
It is either due to:
1. The precision of the installed 32.768 kHz crystal.
2. The code that produces the apparent clock frequency.
3. The accuracy of the PLL that performs the multiplication of the crystal frequency.
4. Other source?
While I suspect it is 3, it would be nice if it is 1, then a replacement of the crystal would solve this variability.
TIA,
TomC
AFAIK, the variability comes from the PLL, although I'm not sure if this is some sort of "spread spectrum" feature or not. For the HP48G/G+/GX, the crystal oscillator is used as an input to the PLL which multiplies the crystal oscillator's 32768Hz frequency by 16, and then by 15 and finally divides the result by 2 to give a CPU frequency of about : 3932160Hz .
Regards,
Jonathan
Thanks Jonathon for the reminder of that PLL math. Yet, I would think the clock would be more stable - I may look into measuring internally with a frequency counter.
TomC
(02-10-2021 09:58 PM)Jonathan Busby Wrote: [ -> ] (02-06-2021 01:43 PM)TomC Wrote: [ -> ]As we know, the processor clock of the HP48 has a bit of apparent variability. The hardware multiplies the installed 32.768kHz crystal to about 4MHz. (one finds this when doing the <ON><D>A test.
Has anybody studied or understood the source of this variability?
It is either due to:
1. The precision of the installed 32.768 kHz crystal.
2. The code that produces the apparent clock frequency.
3. The accuracy of the PLL that performs the multiplication of the crystal frequency.
4. Other source?
While I suspect it is 3, it would be nice if it is 1, then a replacement of the crystal would solve this variability.
TIA,
TomC
AFAIK, the variability comes from the PLL, although I'm not sure if this is some sort of "spread spectrum" feature or not. For the HP48G/G+/GX, the crystal oscillator is used as an input to the PLL which multiplies the crystal oscillator's 32768Hz frequency by 16, and then by 15 and finally divides the result by 2 to give a CPU frequency of about : 3932160Hz .
Regards,
Jonathan
Also, I just noticed that there is a 'SPD' pin [37] on the Yorke processor that appears to be unterminated. It is close to a ground path on the PCB. I wonder what effect terminating this one way or the other (ground or VCC) would have.
TomC
(02-10-2021 10:27 PM)TomC Wrote: [ -> ]Thanks Jonathon for the reminder of that PLL math. Yet, I would think the clock would be more stable - I may look into measuring internally with a frequency counter.
TomC
(02-10-2021 09:58 PM)Jonathan Busby Wrote: [ -> ]AFAIK, the variability comes from the PLL, although I'm not sure if this is some sort of "spread spectrum" feature or not. For the HP48G/G+/GX, the crystal oscillator is used as an input to the PLL which multiplies the crystal oscillator's 32768Hz frequency by 16, and then by 15 and finally divides the result by 2 to give a CPU frequency of about : 3932160Hz .
Regards,
Jonathan
(02-10-2021 10:27 PM)TomC Wrote: [ -> ]Thanks Jonathon for the reminder of that PLL math. Yet, I would think the clock would be more stable - I may look into measuring internally with a frequency counter.
TomC
Aaahhh! My eyes!
( ie., it's "Jonathan" with an "a"
I must sound like a Greek friend of mine when I type his name in Greek and forget the correct placement of the acute accent
)
Regards,
Jonath
an
(02-10-2021 10:44 PM)TomC Wrote: [ -> ]Also, I just noticed that there is a 'SPD' pin [37] on the Yorke processor that appears to be unterminated. It is close to a ground path on the PCB. I wonder what effect terminating this one way or the other (ground or VCC) would have.
TomC
Actually, that pin is ( *should* be at least ) connected to the supply voltage. HP made the Yorke such that it could be configured to behave like the HP48S/SX's Clarke SoC and run at half the speed so that they would only have to change a few
See Note #1 pin connections for the manufacture of an S/SX or a G/GX.
There's an old post in comp.sys.hp48 by Dave Arnett about this, but, I don't remember what the post/thread title was and I can't find it ATM.
NOTE #1 : The above reads like one only has to change the connections or other electrical properties of special pads on the Yorke SoC to "make" an S/SX or a G/GX, but that is not what I meant -- Instead, one only has to change the electrical properties ( eg. connections ) of the Yorke SoC's pads in order to transform the Yorke SoC into, what was for all intents and purposes, a Clarke-compatible SoC for an S/SX, *but* that only works for the SoC and not the rest of the calculator. The main PCB would still be completely different than the corresponding G/GX model, but, one would not need a Clarke SoC as the Yorke can be switched, by means already discussed, to a fully Clarke compatible mode that only runs at around 2MHz.
Regards,
Jonathan
Hello Jonathan,
The message you are looking for was posted on September 22nd, 1994. Somebody asked whether it is possible to "change the speed of the HP-48SX." Here is Dave Arnett's response:
Faster SX? Don't quote me on this, and don't ask for further
information. All the 48s operate from a 32768 Hz crystal. It is
possible, though unlikely, that damage to that crystal could change its
tuning by small amounts and remain within the functional limit of the
CPU. But we wouldn't expect big changes.
The 2x speed YORKE chip was originally intended for an enhancement
of the S series, but there were some issues with the foundry of controlling
process parameters to achieve good yields on 2x-capable chips. The original
Yorkes were generally, though not exclusively or completely, capable of
running 2x speed at room temperatures. To meet project and contract goals,
some of the very late S series machines were built using Yorkes running at
1X. We originaly put together the Rev H ROM for a 2x S-series machine.
When the 2x yield was in question, we put out Rev J, which is a Yorke chip
running 1x, the only speed at which that batch of Yorkes is fully qualified
to run. So if you have a Rev J machine, you also have Yorke.
Some of the Rev J machines would actually run at 2x speed, if pin
37 were tied to Vdd rather than Gnd. By experience, I have found that
making pin 37 float will also cause 2x operation. However, the Rev J code
will not expect that operation speed, and some operations will be
affected. Also, processor operation on a Rev J unit may be flaky if it
is run at 2x speed, since these chips were not fully qualified for 2x
operation.
We actually considered making the G run at 1X, with the GX at 2X,
until the 2x yield issues were resolved. In fact, the G-series circuit
board is equipped to build either an S-series OR a G-series on the same
PCB. At several locations on the board (for those who are daring enough
to have voided warranties and opened their units), you will see some
solderable jumper pads. A solderable pad is soldered automatically by a
process I won't bother to describe, and it simply consists of two capital
Us interlocked. The two of interest are X1, located between the Yorke
and the serial connector, and X2, located roughly in the center of the board
near the lower middle LCD twist tab. Soldering both of these would
create a short circuit. Soldering X1 only runs York at 1X, and soldering
X2 only runs Yorke at 2X. There are other pads elsewhere on the PCB
which reorganize the internal port controllers and bypass some of the
bank select circuitry to achieve an equivalent SX configuration. Note
that if you have a Rev J S series, you have a completely different PCB,
so this discussion of jumper pads is of no help.
So that's the general rundown of clock speed switching. Note that
I am not speaking in any official context, and certainly not as an HP
representative. HP does not recommend that you modify any of these
parameters or connections, and neither do I. This posting is simply a
personal attempt to provide insight into how the 48 operates, and to provide
some historical and trivial background for entertainment and amusement.
I do not feel obliged to provide further information on this topic,
and I am known to ingnore e-mail from the outside world whenever I feel so
inclined. If you think I've ingnored you, please do not feel slighted.
You are in VERY good company!
Good Day!
Dave Arnett
(02-10-2021 11:24 PM)Giuseppe Donnini Wrote: [ -> ]Hello Jonathan,
The message you are looking for was posted on September 22nd, 1994. Somebody asked whether it is possible to "change the speed of the HP-48SX." Here is Dave Arnett's response:
[snip]
Thanks for the quote
Don't know how you found it so quickly -- I must have missed it in my search.
Thanks again and regards,
Jonathan
(02-10-2021 11:31 PM)Jonathan Busby Wrote: [ -> ] (02-10-2021 11:24 PM)Giuseppe Donnini Wrote: [ -> ]Hello Jonathan,
The message you are looking for was posted on September 22nd, 1994. Somebody asked whether it is possible to "change the speed of the HP-48SX." Here is Dave Arnett's response:
[snip]
Thanks for the quote Don't know how you found it so quickly -- I must have missed it in my search.
Thanks again and regards,
Jonathan
Just as a help to readers : The google groups link is :
https://groups.google.com/g/comp.sys.hp4...oPYt7hHDkJ
Regards,
Jonathan
(02-10-2021 11:31 PM)Jonathan Busby Wrote: [ -> ]Don't know how you found it so quickly -- I must have missed it in my search.
Well, I didn't have to look it up on comp.sys.hp48 since I have my own highly structured database on the HP-48.
Thanks for adding the link.
Jonathan/Giuseppe:
Thank you for 'digging' that up - most helpful. I've found both the X1 and X2 jumper locations on this (version J?) board I have cannibalized.
TomC
(02-10-2021 11:24 PM)Giuseppe Donnini Wrote: [ -> ]Hello Jonathan,
The message you are looking for was posted on September 22nd, 1994. Somebody asked whether it is possible to "change the speed of the HP-48SX." Here is Dave Arnett's response:
Faster SX? Don't quote me on this, and don't ask for further
information. All the 48s operate from a 32768 Hz crystal. It is
possible, though unlikely, that damage to that crystal could change its
tuning by small amounts and remain within the functional limit of the
CPU. But we wouldn't expect big changes.
The 2x speed YORKE chip was originally intended for an enhancement
of the S series, but there were some issues with the foundry of controlling
process parameters to achieve good yields on 2x-capable chips. The original
Yorkes were generally, though not exclusively or completely, capable of
running 2x speed at room temperatures. To meet project and contract goals,
some of the very late S series machines were built using Yorkes running at
1X. We originaly put together the Rev H ROM for a 2x S-series machine.
When the 2x yield was in question, we put out Rev J, which is a Yorke chip
running 1x, the only speed at which that batch of Yorkes is fully qualified
to run. So if you have a Rev J machine, you also have Yorke.
Some of the Rev J machines would actually run at 2x speed, if pin
37 were tied to Vdd rather than Gnd. By experience, I have found that
making pin 37 float will also cause 2x operation. However, the Rev J code
will not expect that operation speed, and some operations will be
affected. Also, processor operation on a Rev J unit may be flaky if it
is run at 2x speed, since these chips were not fully qualified for 2x
operation.
We actually considered making the G run at 1X, with the GX at 2X,
until the 2x yield issues were resolved. In fact, the G-series circuit
board is equipped to build either an S-series OR a G-series on the same
PCB. At several locations on the board (for those who are daring enough
to have voided warranties and opened their units), you will see some
solderable jumper pads. A solderable pad is soldered automatically by a
process I won't bother to describe, and it simply consists of two capital
Us interlocked. The two of interest are X1, located between the Yorke
and the serial connector, and X2, located roughly in the center of the board
near the lower middle LCD twist tab. Soldering both of these would
create a short circuit. Soldering X1 only runs York at 1X, and soldering
X2 only runs Yorke at 2X. There are other pads elsewhere on the PCB
which reorganize the internal port controllers and bypass some of the
bank select circuitry to achieve an equivalent SX configuration. Note
that if you have a Rev J S series, you have a completely different PCB,
so this discussion of jumper pads is of no help.
So that's the general rundown of clock speed switching. Note that
I am not speaking in any official context, and certainly not as an HP
representative. HP does not recommend that you modify any of these
parameters or connections, and neither do I. This posting is simply a
personal attempt to provide insight into how the 48 operates, and to provide
some historical and trivial background for entertainment and amusement.
I do not feel obliged to provide further information on this topic,
and I am known to ingnore e-mail from the outside world whenever I feel so
inclined. If you think I've ingnored you, please do not feel slighted.
You are in VERY good company!
Good Day!
Dave Arnett
(02-11-2021 12:04 PM)TomC Wrote: [ -> ]Thank you for 'digging' that up - most helpful. I've found both the X1 and X2 jumper locations on this (version J?) board I have cannibalized.
Nice to hear.
By the way, it would be interesting to know the serial number of the unit you cannibalized. (Is it an S or SX?)
This PC board came from a 48G, SN 3402S... which would make it a version P or R (according to Megarats list in article 991 on the Museum website. I've got pics of the PCB, and can send them if you like via PM. (I'd rather not clutter the site here.)
TomC
(02-11-2021 12:16 PM)Giuseppe Donnini Wrote: [ -> ] (02-11-2021 12:04 PM)TomC Wrote: [ -> ]Thank you for 'digging' that up - most helpful. I've found both the X1 and X2 jumper locations on this (version J?) board I have cannibalized.
Nice to hear.
By the way, it would be interesting to know the serial number of the unit you cannibalized. (Is it an S or SX?)
(02-10-2021 09:58 PM)Jonathan Busby Wrote: [ -> ] (02-06-2021 01:43 PM)TomC Wrote: [ -> ]As we know, the processor clock of the HP48 has a bit of apparent variability. The hardware multiplies the installed 32.768kHz crystal to about 4MHz. (one finds this when doing the <ON><D>A test.
Has anybody studied or understood the source of this variability?
It is either due to:
1. The precision of the installed 32.768 kHz crystal.
2. The code that produces the apparent clock frequency.
3. The accuracy of the PLL that performs the multiplication of the crystal frequency.
4. Other source?
While I suspect it is 3, it would be nice if it is 1, then a replacement of the crystal would solve this variability.
TIA,
TomC
AFAIK, the variability comes from the PLL, although I'm not sure if this is some sort of "spread spectrum" feature or not. For the HP48G/G+/GX, the crystal oscillator is used as an input to the PLL which multiplies the crystal oscillator's 32768Hz frequency by 16, and then by 15 and finally divides the result by 2 to give a CPU frequency of about : 3932160Hz .
Regards,
Jonathan
Forgot to mention that the variability in the CPU clock most likely comes from the VCO ( Voltage Controlled Oscillator ) portion of the PLL, and *not* the crystal, although I may be wrong.
Regards,
Jonathan
