01-09-2021, 04:44 PM
Greetings forum
I've recently acquired an old metallurgic microscope that is good enough for micro-meter scale chip analysis. The first thing I set out to do is to decap and obtain a complete photograph of HP ACT - the second generation calculator chipset seen in the Woodstock series.
https://lithcore.cn/decaps
For those wanting to know more about the circuit design, a good way to start is by reading the Verilog source code of Monte's 41CL that he kindly provides. This implementation is almost identical to the original design, and HP-41's architecture is basically an enhanced version of that of the earlier chipsets.
Also, years ago, I wrote three articles on my blog, exploring the details of HP's bit serial design. To me, a student who was born in the CMOS VLSI era, bit-serial calculator chip design is totally exotic. The adventure was quite enjoyable.
https://lithcore.cn/2103
I've recently acquired an old metallurgic microscope that is good enough for micro-meter scale chip analysis. The first thing I set out to do is to decap and obtain a complete photograph of HP ACT - the second generation calculator chipset seen in the Woodstock series.
https://lithcore.cn/decaps
For those wanting to know more about the circuit design, a good way to start is by reading the Verilog source code of Monte's 41CL that he kindly provides. This implementation is almost identical to the original design, and HP-41's architecture is basically an enhanced version of that of the earlier chipsets.
Also, years ago, I wrote three articles on my blog, exploring the details of HP's bit serial design. To me, a student who was born in the CMOS VLSI era, bit-serial calculator chip design is totally exotic. The adventure was quite enjoyable.
https://lithcore.cn/2103