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Hi all,

I was poking around in an old HP Journal looking at the HP35 block diagram and noticed that the cathode driver has a reset line, but not the anode driver. On looking at what limited detail I could find on the web, it looks like it doesn't have any reset.

The display digits are decoded by this chip depending on its internal timing around T1 - T4, but I can't find any way that these could be synchronised with the calculator timing. For example, a digit might appear at the anode driver in the middle of T3 for example and be decoded wrongly.

Just curious, anyone know more details?

cheers

Tony
Hi Tony,

This is all described by late Jacques Laport, thanks to Eric you can still access his website here.

It's been a while since I programmed it, but hopefully I remember it correctly.
The anode driver generates the clock and decodes the segments for each digit. It clocks the cathode driver, which essentially is a shift register. The start bit is set by the A&R.
The anode drivers internal reset is generated from two of the five input lines containing segment data. It happens when segments B and D are turned on simultaneously. This means the synchronization happens automatically when the initial display containing a "0" is shown. And indeed it is required. With my board I can display whatever I want at startup. The display shows nonsense if non of the characters contain segments b and d simultaneously. So I always start with "0.00" for a split second. You can notice that if an HP35 is emulated because the HP35 startup display is not "0.00"

Cheers,
Harald
(05-11-2019 06:53 PM)Harald Wrote: [ -> ]Hi Tony,

This is all described by late Jacques Laport, thanks to Eric you can still access his website here.

It's been a while since I programmed it, but hopefully I remember it correctly.
The anode driver generates the clock and decodes the segments for each digit. It clocks the cathode driver, which essentially is a shift register. The start bit is set by the A&R.
The anode drivers internal reset is generated from two of the five input lines containing segment data. It happens when segments B and D are turned on simultaneously. This means the synchronization happens automatically when the initial display containing a "0" is shown. And indeed it is required. With my board I can display whatever I want at startup. The display shows nonsense if non of the characters contain segments b and d simultaneously. So I always start with "0.00" for a split second. You can notice that if an HP35 is emulated because the HP35 startup display is not "0.00"

Cheers,
Harald

Hi Harald,

Thanks for the reply. It funny how just a few words can open up a whole range of information.

I remembered about Jarques' HP-35 site yesterday and had a look but the info was a bit vague on the anode driver RCD function. I figured it had to be the key but wasn't sure how.

If I understand correctly and by looking at the logic diagram, the reset pulse will occur at any time that the B and D lines from the A&R chip are driven high and coincide with the PHI_1 signal.

Q1 and Q2 repeat the same sequence every PHI_1 cycle, but Q3 and Q4 are the ones that could be out of sync, so the pulse resets Q3, sets Q4, and sets Q1 also. Now I see the dotted lines on the timing diagram reflect this. This then puts those clock lines in the correct state for the T2 cycle and should then synchronize the A&R T2 to the anode driver T2. Why T2? It's probably the only place to do it and not interfere with the timing.

If nothing changes now, that timing should stay until power off, but if there is a glitch in the matrix, then the display will show garbage which is why it is reset often during display refreshes, and as you point out it is totally transparent. It won't reset at all when, say, [111.111] is displayed.

The power up display on the 35 is [0.] so I assume then, that on the very first display refresh the display digits will most likely have garbage. When the [0] is to be displayed, it will cause the anode driver to reset itself to the T2 cycle. If the decimal point did not display on the first pass, then the display will finish a digit short, but won't matter because the cathode driver will receive a pulse shortly to reset itself.

Then the sequence will repeat but should work properly for the second and subsequent refreshes. Of course this happens before you can blink an eye, so the user won't notice the initial mayhem.

I notice on Tony Duels HP35 circuit that the anode driver has a reset pin but is held low all the time. It may be a way to fully reset the chip, but I imagine the other sequence would still have to follow.

It's amazing the lengths the engineers went to in those days to keep everything compact and not add stuff where it is not really needed.

cheers

Tony
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