The Museum of HP Calculators

This article is Copyright © 1972 by Hewlett-Packard and is used by permission. The article was originally published in the December, 1972 issue of the Hewlett-Packard Journal. If errors crept in during the scanning process, please contact Dave Hicks

Versatile Input/Output Structure Welcomes Peripheral Variety

By Gary L. Egan

THE INPUT/OUTPUT STRUCTURE of 9800-Series Calculators, which links the calculator with its peripherals, is designed to be versatile and easy to use. It is flexible enough so a user can easily interface his calculator with a variety of HP peripherals as well as with many standard units and others of his own design.

I/O Processor

The input/output processor is a self-contained microprocessor composed of commercially available TTL logic circuits which generate the microinstructions necessary to.implement the ten input-output instructions. The I/O processor is fully synchronous with the system clock and main processor, receiving starting control from the main processor whenever an input-output instruction is read from memory. While the I/O processor is in control, the main processor remains in a two-state waiting loop until the input-output instruction has been implemented, whereupon control is returned to the main processor. (See Fig. 1.)

The input/output instructions require six to twelve microseconds to execute. There are I/O instructions for setting or clearing flip-flops, for testing the state of flip-flops, and for moving data between registers in the main processor and the input/output register.

I/O Register

The I/O register is a 16-bit universal (parallel in/out, serial in/out) data register that is connected to the main processor by the serial bus system. Data contained in the I/O register is sent bit-serial into the main processor via the S-bus. Conversely, bit-serial data is received from the main processor by the I/O register via the T-bus.

The I/O register's 16 parallel outputs provide the source for an output information bus structure which is common to all connecting peripherals. Parallel input information is received via an input information bus structure terminated by the twelve least-significant parallel inputs of the I/O register. Input information may be loaded into the I/O register by interrupt request or upon demand from the calculator.

All data communication between individual peripherals and the calculator makes use of a "hand-shaking" operation. Data is placed on the bus lines by the transmitter and then a signal indicating data ready is sent. The receiver acknowledges this and returns a signal noting that data has been accepted.

Associated with the I/O register are control circuits that implement this "handshaking" operation. The control circuitry consists of gates and flip-flops which are controlled by the I/O processor.

Internal Peripherals

A group of peripherals which may be contained within the calculator are called internal peripherals and are distinguished from a group called external peripherals by the fact that they are directly addressed as a part of the input/output instruction. This group of internal peripherals includes keyboard, display, magnetic-card storage, thermal printer, and I/O register.

Each internal peripheral has associated with it a driver contained in read-only memory in the basic calculator, plus supporting control hardware. The I/O register is included as an internal peripheral since it is directly addressable from the I/O instruction set and it functions as a holding and passing register for all peripherals. Fig. 2 shows the relationship between the internal peripherals and the I/O structure.

External Peripherals

External peripherals are connected to the calculator by an external signal cable. They are addressed indirectly from the I/O register. In general the driver for any external peripheral is contained in a plug-in ROM which may be unique to a certain peripheral (e.g., a typewriter) or may contain a general-purpose driver which communicates in bit-parallel, character-serial ASCII. Fig. 2 also shows the relationship between external peripherals and the I/O structure.

Peripheral Communication

All internal peripherals are addressed by the I/O instructions. Therefore, the receiving peripherals have access to the full 16-bit field of the I/O register. In addition each internal peripheral has its own control and flag logic by which "handshaking" takes place.

Communication with an external peripheral requires that a 16-bit word be formed in the processor. This word consists of a four-bit address in the four most significant bit.positions, a four-bit status word in the four next-most-significant bit positions, and eight data bits in the eight least significant bit positions. This 16-bit word is sent to the I/O register, where the parallel outputs of the I/O register place the word on the bus structure. After this has been accomplished a control signal is placed on the control line which, with the decoded four-bit address, causes the desired peripheral to take action. A receiving peripheral acknowledges the receipt of data by returning a flag signal. A transmitting peripheral places its data and status on the twelve input lines and sends a data-ready signal to the calculator.

The kinds of external peripherals are unlimited. The addressing scheme of 9800 Series Calculators provides for a maximum of 15 different addresses. Of these, addresses 10 through 15 are fixed and are reserved for unique drivers. Addresses 1 through 9 are variable and may be selected on a peripheral's interface card by means of jumper wires or switches. The bus structure makes the peripheral interfaces slot-independent, that is, they may be connected to any calculator I/O slot. The basic calculator has 4 slots for peripherals, and this can be expanded to as many as 40 by means of I/O expanders.


The I/O system uses time-proven TTL circuits with known good reliability characteristics. Supplementing the hardware reliability, the handshaking operation assures reliable data transmission over cables up to lo feet long. Although 10 feet is the maximum recommended length, longer cables have been used successfully.

Gary L. Egan
Now a calculator peripherals group leader, Gary Egan was project leader for the 9800-Series l/O Structure. At HP since 1965, his previous design contributions were to the 3430A and 3450A DVMs. Gary received his B.S. degree in 1964 and his M.S. degree in 1965 from Utah State University. Golf, church activities, and remodeling his house are his principal spare-time activities, and his favorite vacation is exploring the country by car.

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