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41CL Self-Update
11-19-2017, 04:12 AM
Post: #101
RE: 41CL Self-Update
(11-19-2017 03:42 AM)Neve Wrote:  How do you turn on the serial port and send a byte??
I have done it in the past, just don't remember right now, I am currently transmitting bytes but the result are not conclusive.
Once I am back to speed on this, I will post a detailed how-to.

(11-19-2017 03:42 AM)Neve Wrote:  I performed the procedure Sylvain suggested earlier. I believe that’s what it does.
Yes it does, but Monte suggestion removes the USB-to-Serial dongle from the equation.

(11-19-2017 03:42 AM)Neve Wrote:  I’m 100% certain that the inside connector is not reversed. It looks exactly as the pictures on the CL manual. Also, it won’t fit the other way around.
ok, so another variable removed.

(11-19-2017 03:42 AM)Neve Wrote:  Maybe the connections at the back of the female jack are not the right ones. That’s all I can think of at the moment.
Did you buy the 41CL serial cable from Monte or did you made one by yourself ?

(11-19-2017 03:42 AM)Neve Wrote:  Needless to say this is very frustrating.
I understand.
What's frustrating for me, is that I could probably resolved the issue in less than 5 minutes if I were right beside you.
Being in the dark, we are doing what we can remotely, please be patient.

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11-19-2017, 04:31 AM (This post was last modified: 11-19-2017 04:32 AM by Neve.)
Post: #102
RE: 41CL Self-Update
(11-19-2017 04:12 AM)Sylvain Cote Wrote:  I have done it in the past, just don't remember right now, I am currently transmitting bytes but the result are not conclusive.
Once I am back to speed on this, I will post a detailed how-to.

I see.

(11-19-2017 04:12 AM)Sylvain Cote Wrote:  Yes it does, but Monte suggestion removes the USB-to-Serial dongle from the equation.

Got it.

(11-19-2017 03:42 AM)Neve Wrote:  Maybe the connections at the back of the female jack are not the right ones. That’s all I can think of at the moment.
(11-19-2017 04:12 AM)Sylvain Cote Wrote:  Did you buy the 41CL serial cable from Monte or did you made one by yourself ?
I bought everything from Monte. I’m talking about the female 2.5 jack connector mounted on the 3D port cover.
I had to remove it. But using the info on the 41CL manual (pages 92-...) I was able to reconnect it properly (or maybe not).
I know the ground apparently goes to the middle longest and curved tip (I’ve checked that with my DVM).
And I’ve used the other info to connect the RX and TX wires. On my last attempt I even reversed them to make sure. But nothing changed...

(11-19-2017 03:42 AM)Neve Wrote:  Needless to say this is very frustrating.
(11-19-2017 04:12 AM)Sylvain Cote Wrote:  I understand.
What's frustrating for me, is that I could probably resolved the issue in less than 5 minutes if I were right beside you.
Being in the dark, we are doing what we can remotely, please be patient.

Sylvain

I know, and I appreciate that greatly.
I would hate to have to open it again. The risk of damaging the case or something else gets higher the more I open it, and I’ve done that quite a few times already.

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11-19-2017, 05:11 AM
Post: #103
RE: 41CL Self-Update
(11-19-2017 03:42 AM)Neve Wrote:  
(11-18-2017 10:10 PM)Monte Dalrymple Wrote:  It is possible to test the 41CL serial port. Basically plug in the serial cable and then
connect the TX and RX pins on the DB9 end. Turn on the serial port and send a
byte. Then check the receiver for a received byte. No need to take the machine
apart.

How do you turn on the serial port and send a byte??
I performed the procedure Sylvain suggested earlier. I believe that’s what it does.
I’m 100% certain that the inside connector is not reversed. It looks exactly as the pictures on the CL manual. Also, it won’t fit the other way around.
However, maybe one of the wire strands is cut or defective, or is too compressed between the two halves. I don’t know...
Maybe the connections at the back of the female jack are not the right ones. That’s all I can think of at the moment.

Needless to say this is very frustrating.


Insert the serial cable plug. On the other end, connect pins 2 and 3 of the DB9
together. This creates a loopback condition.

Using YFNX:

XEQ "SERINI"
XEQ "SERON"
"805000-0000"
XEQ "YMCLR"
"805000-AAAA"
XEQ "YPOKE"
"0000"
XEQ "YPPNT"
"0010"
XEQ "YGPNT"
XEQ "YPUTLB"
XEQ "YGETLB"
"805010-0000"
XEQ "YPEEK"

The display should show "805010-00AA" indicating that "AA" byte was sent and
received.

This test DOES NOT verify that the RX and TX signals are connected to the
correct pins on the DB9 connector, but it DOES verify that the byte sent
by the transmitter exits the 41CL transmitter, goes through the serial cable,
and returns back to the 41CL receiver.

Monte
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11-19-2017, 05:37 AM (This post was last modified: 11-19-2017 05:38 AM by Neve.)
Post: #104
RE: 41CL Self-Update
(11-19-2017 05:11 AM)Monte Dalrymple Wrote:  Insert the serial cable plug. On the other end, connect pins 2 and 3 of the DB9
together. This creates a loopback condition.

Using YFNX:

XEQ "SERINI"
XEQ "SERON"
"805000-0000"
XEQ "YMCLR"
"805000-AAAA"
XEQ "YPOKE"
"0000"
XEQ "YPPNT"
"0010"
XEQ "YGPNT"
XEQ "YPUTLB"
XEQ "YGETLB"
"805010-0000"
XEQ "YPEEK"

The display should show "805010-00AA" indicating that "AA" byte was sent and
received.

This test DOES NOT verify that the RX and TX signals are connected to the
correct pins on the DB9 connector, but it DOES verify that the byte sent
by the transmitter exits the 41CL transmitter, goes through the serial cable,
and returns back to the 41CL receiver.

Monte

Thank you Monte.

Everything is fine until I execute XEQ “YGETLB”. At this point The display shows almost immediately “TIMEOUT”.
Then, when I execute XEQ “YPEEK” I get “805010-0000”.

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11-19-2017, 06:27 AM
Post: #105
RE: 41CL Self-Update
(11-19-2017 05:11 AM)Monte Dalrymple Wrote:  "0000"
XEQ "YPPNT"
"0010"
XEQ "YGPNT"
Arrggg, I forgot that part.
I even setup my logic analyser on RX & TX to see what was going on.
Now its working! Smile
Thanks for the reminder Monte.
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11-19-2017, 06:31 AM
Post: #106
RE: 41CL Self-Update
(11-19-2017 05:37 AM)Neve Wrote:  Everything is fine until I execute XEQ “YGETLB”. At this point The display shows almost immediately “TIMEOUT”.
Check that your loopback wire is fully connected.
I got the same timeout message, then I realized that the loopback wire was not fully connected.
I plugged the wire correctly, then redid the complete procedure and it worked.
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11-19-2017, 06:39 AM
Post: #107
RE: 41CL Self-Update
(11-19-2017 06:31 AM)Sylvain Cote Wrote:  
(11-19-2017 05:37 AM)Neve Wrote:  Everything is fine until I execute XEQ “YGETLB”. At this point The display shows almost immediately “TIMEOUT”.
Check that your loopback wire is fully connected.
I got the same timeout message, then I realized that the loopback wire was not fully connected.
I plugged the wire correctly, then redid the complete procedure and it worked.
Sylvain

I’ll try that again, thank you Sylvain.
Je commence à désespérer...

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11-19-2017, 07:42 AM
Post: #108
RE: 41CL Self-Update
Sylvain/Monte

I checked and reconnected 2 and 3 on the DB9.
I still get a “TIMEOUT” shortly after XEQ “YGETLB”.
At this point the ALPHA register shows: 804016-0010, and the last command (which I executed anyway) shows: 805010-0000

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11-19-2017, 08:21 AM
Post: #109
RE: 41CL Self-Update
(11-19-2017 07:42 AM)Neve Wrote:  Sylvain/Monte

I checked and reconnected 2 and 3 on the DB9.
I still get a “TIMEOUT” shortly after XEQ “YGETLB”.
At this point the ALPHA register shows: 804016-0010, and the last command (which I executed anyway) shows: 805010-0000

Dernière validation, après ça je suis à court d'idées.

Just to be sure, the pins to shorten (2 & 3) are the ones from the DB9 female pinout here.

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11-19-2017, 08:56 AM
Post: #110
RE: 41CL Self-Update
(11-19-2017 08:21 AM)Sylvain Cote Wrote:  
(11-19-2017 07:42 AM)Neve Wrote:  Sylvain/Monte

I checked and reconnected 2 and 3 on the DB9.
I still get a “TIMEOUT” shortly after XEQ “YGETLB”.
At this point the ALPHA register shows: 804016-0010, and the last command (which I executed anyway) shows: 805010-0000

Dernière validation, après ça je suis à court d'idées.

Just to be sure, the pins to shorten (2 & 3) are the ones from the DB9 female pinout here.

Sylvain

Yes, the one on the other end of the 2.5 jack cable I got from Monte.

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11-19-2017, 09:49 AM (This post was last modified: 11-19-2017 07:06 PM by Neve.)
Post: #111
RE: 41CL Self-Update
I opened up the calc (again) and I checked for possible shorts between the CPLD connector and the female 2.5 jack mounted on the 3D port cover. No shorts there.
Just to verify and be sure it’s not reversed, the ground wire on the CPLD side is the one closest to the FPGA connector, right? And it goes to the longest, curved middle tip on the 2.5 side.
If this is the case, I have it right.
The only thing that could be wrong, from my point of view, would be the reversed TX/RX on the 2.5 female jack.
However, Monte said that his method didn’t check for that....
Should I reverse them again? (Although I tried that earlier and it still didn’t work on the Mac)

I’m desperate....

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11-19-2017, 06:48 PM
Post: #112
RE: 41CL Self-Update
(11-19-2017 09:49 AM)Neve Wrote:  I opened up the calc (again) and I checked for possible shorts between the CPLD connector and the female 2.5 jack mounted on the 3D port cover. No shorts there.
Just to be verify and be sure it’s not reversed, the ground wire on the CPLD side is the one closest to the FPGA connector, right? And it goes to the longest, curved middle tip on the 2.5 side.
If this is the case, I have it right.
The only thing that could be wrong, from my point of view, would be the reversed TX/RX on the 2.5 female jack.
However, Monte said that his method didn’t check for that....
Should I reverse them again? (Although I tried that earlier and it still didn’t work on the Mac)

I’m desperate....

If you have a voltmeter, pin 2 on the DB9 connector is TX. The metal "shell" on
the connector is ground. The voltage between pin 2 and GND is 0 when the serial
port is off. Executing SERON should make pin 2 go to about 5V. I don't remember
if it's plus or minus, but that doesn't matter, it's the presence of a voltage when
the serial port is on.
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11-19-2017, 07:11 PM
Post: #113
RE: 41CL Self-Update
(11-19-2017 06:48 PM)Monte Dalrymple Wrote:  If you have a voltmeter, pin 2 on the DB9 connector is TX. The metal "shell" on
the connector is ground. The voltage between pin 2 and GND is 0 when the serial
port is off. Executing SERON should make pin 2 go to about 5V. I don't remember
if it's plus or minus, but that doesn't matter, it's the presence of a voltage when
the serial port is on.

Thank you Monte.
I’ll check that out and report back when I get home.

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11-19-2017, 08:11 PM
Post: #114
RE: 41CL Self-Update
(11-19-2017 09:49 AM)Neve Wrote:  Just to be verify and be sure it’s not reversed, the ground wire on the CPLD side is the one closest to the FPGA connector, right?
Here is a picture of my not yet installed second 41CLv5 with the serial cable plugged in.
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11-19-2017, 08:37 PM
Post: #115
RE: 41CL Self-Update
(11-19-2017 08:11 PM)Sylvain Cote Wrote:  
(11-19-2017 09:49 AM)Neve Wrote:  Just to be verify and be sure it’s not reversed, the ground wire on the CPLD side is the one closest to the FPGA connector, right?
Here is a picture of my not yet installed second 41CLv5 with the serial cable plugged in.

Thanks Sylvain!
Yep, that’s it. Exactly the same here.
Do you have a picture of which wire goes where on the female 2.5 jack by any chance?

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11-19-2017, 09:39 PM
Post: #116
RE: 41CL Self-Update
(11-19-2017 08:37 PM)Neve Wrote:  
(11-19-2017 08:11 PM)Sylvain Cote Wrote:  Here is a picture of my not yet installed second 41CLv5 with the serial cable plugged in.

Thanks Sylvain!
Yep, that’s it. Exactly the same here.
Do you have a picture of which wire goes where on the female 2.5 jack by any chance?

Yep! here: picture 1, picture 2 & picture 3
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11-20-2017, 03:55 PM
Post: #117
RE: 41CL Self-Update
Monte, Sylvain,
Thank you both for your valuable help. Just to let you know that, although I haven’t had the time to try the update process on the Mac, the method Monte suggested to test the connection works fine now. I assume the update process will perform flawlessly now.
Thanks to Sylvain’s pictures, I was able to see what was wrong. The Grnd was not connected to the right pin on the 2.5 female jack.
Problem solved. I’ll update this V5 board as soon as I have some time and let you guys know how it went.

Thank’s again to all those who tried to help.

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11-21-2017, 03:08 AM
Post: #118
RE: 41CL Self-Update
Just to let you know that the update went fine (finally).
On a side note, the clupdate program showed 13 pages out-of-date, not 14.

Cheers

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11-21-2017, 09:54 AM
Post: #119
RE: 41CL Self-Update
(11-21-2017 03:08 AM)Neve Wrote:  Just to let you know that the update went fine (finally).
Félicitation!

(11-21-2017 03:08 AM)Neve Wrote:  On a side note, the clupdate program showed 13 pages out-of-date, not 14.
You lost me here, why that remark ?
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11-21-2017, 10:08 AM (This post was last modified: 11-21-2017 10:08 AM by Neve.)
Post: #120
RE: 41CL Self-Update
(11-21-2017 09:54 AM)Sylvain Cote Wrote:  
(11-21-2017 03:08 AM)Neve Wrote:  Just to let you know that the update went fine (finally).
Félicitation!

Thank you.

(11-21-2017 03:08 AM)Neve Wrote:  On a side note, the clupdate program showed 13 pages out-of-date, not 14.
(11-21-2017 09:54 AM)Sylvain Cote Wrote:  You lost me here, why that remark ?

It’s just that I thought it was worthy to mention that while the guide for the update process states that the clupdate program should show 14 pages out-of-date, that mine showed only 13. Nothing major, though.

I’m sorry if it wasn’t worth mentioning.

And thank you again for everything!

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