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[HP-35] The HP-35: a tale of teamwork with vendors
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[HP-35] The HP-35: a tale of teamwork with vendors
The following article was published in Electronics/February 1, 1973.

The HP-35: a tale of teamwork with vendors

When the company president wanted a scientific calculator that would fit into his shirt pocket,
Hewlett-Packard got into a new business, with a lot of help from its MOS suppliers
by Gerald M. Walker, ELECTRONICS, Associate Editor

For a shirt-pocket calculator, the HP-35 has already piled up enough charisma to get a spot on a TV talk show—if it could talk. Fortunately for the Hewlett-Packard team of designers and the vendors they brought in to help, company president William Hewlett did not ask that the little calculator talk. He did, however, set the basic objectives for the HP-35 which were to provide its personality.

Like any popular new star, it has had both triumphs and tribulation. The first triumph was for the designers, who got it to the market in less than a year and a half. The second has been a sales success of more than 50,000 units since the machine went on sale a year ago. While the first version has been aimed at the engineer and scientist, another model, the HP-80, has recently been announced for financial and accounting applications.

The tribulation was an embarrassing discovery late last year of a programing error, since corrected, in the LSI memory. Discovered by a user, the error triggered a recall letter to customers, but because the probability that the error would foul up a calculation is very small, not many units have been returned for alteration.

The idea for the HP-35 was originally conceived in March, 1968, when the company introduced the HP-9100A calculator, a table-top, programmable machine for scientific and technical uses. At that time Bill Hewlett wondered if the next calculator developed couldn't be a tenth the size and cost of the 9100A. (It could.) Later he refined the goal to be a battery-powered, hand-held unit capable of being carried in his shirt pocket. (It can be.)

Work had begun in earnest at the Advanced Products division by the fall of 1970, a critical year to be thinking about the hand-held calculator market. At the time, Japanese manufacturers dominated the business-type field, and the first signs had appeared of a consumer market pitting U.S. and Japanese companies in a price battle. Nevertheless, H-P debated whether its first entry should go after the business-machine trade. But by the time that design plans were under way, H-P had decided to stay in the scientific market more familiar to it.

Hewlett had presented a small machine with a tall order to fill. To be a scientific/ engineering calculator, the 35 had:
  • To perform trigonometric, logarithmic, exponential, and square-root functions, as well as the standard four math functions of other hand-held calculators.
  • To have a full two-hundred-decade range, allowing numbers from 10⁻⁹⁹ to 9.999999999 x 10⁺⁹⁹ to be represented in scientific notation.
  • To have a 15-digit display.
  • Finally, with all these added functions, it required a different type of keyboard if every key and contact was to be fitted into a limited space.
Far and away the greatest challenge presented by the HP-35 was the design and development of the necessary metal-oxide-semiconductor large-scale integrated circuits. These consist of three identical instruction read-only memories, an arithmetic-and-register (A&R) chip, and a control-and-timing (C&T) chip. On top of the requirements for high density and high speed imposed by the scientific nature of the machine was the need for low power imposed by its size and portability. Four hours of battery operating time was the goal, yet the shirt-pocket size of the calculator limited the 35 to few and small batteries.

Thomas M. Whitney, section manager for the HP-35, recalls, “To get the right function density we went to a totally serial design, which reduced interconnections both internal to the chip and between chips. The complex algorithms to compute transcendental functions require many multiplications, which forces a high clock rate. To get a 1-second-maximum computation time for any function, we felt a 200-kilohertz bit rate could do the job.”

Help from outside

At this point, the design team made an important decision: to have the MOS design done outside. Hewlett-Packard has some experience in MOS, but the high-density, low-power circuit design was too demanding for it to tackle in the short time Hewlett had allowed for completing the task. This decision created a textbook case of successful vendor relations with the two MOS LSI suppliers eventually chosen for the HP-35: Mostek Corp., Carrollton, Texas; and American Microsystems Inc., Santa Clara, Calif. Each company took a different approach to meeting the MOS requirements, yet the result more than satisfied H-P's specifications.

Whitney points out that one of the requirements for vendor selection was that the firm have a low-threshold process for production. He also avoided companies that had plans to market their own calculators, to dodge any conflict of interest.

After preliminary discussions, seven companies were asked to quote: one dropped out because the part could not be offered to other buyers; two said it couldn't be done with the three-chip partitioning demanded by H-P; and four submitted bids. Mostek and AMI were selected on the basis of a combination of past performance and H-P's belief that the ion-implanted, p-channel MOS process, which they both proposed, was the best route to low-power, high-density chips.

Two vendors were chosen in an effort to insure rapid development, a dual supply source, and competitive prices, says Whitney. Once H-P had picked the suppliers, relations with them were remarkably free. Both were allowed leeway to rework the logic diagrams and the performance specs. And for relaxing its attitude toward vendor suggestions, H-P was rewarded with better-than- spec chip performance.

The degree of freedom permissible in vendor relations was a touchy subject, particularly in view of the time crunch imposed by Hewlett's direct interest. The issue was how much the LSI developers should be allowed to change H-P's original logic design. On the one hand, if a supplier thoroughly understood the requirements, he might be able to suggest improvements. But on the other, there was danger of slowing the project while the engineers wrestled over differing viewpoints or else bogged down production schedules with vendor changes that in turn would require design alterations by the customer.

In this case, AMI chose to work within the H-P logic diagrams by adapting to the requirements. Mostek chose to suggest changes to optimize its own production scheme for meeting the power requirements. Each company claims to have the better approach. Both had problems, fortunately on different portions of the design, so that between the two of them, first delivery dates were met and the first prototype had a mixture of parts from the two vendors.

The first chip AMI produced successfully was the control-and-timing circuit, while it was the last Mostek completed. Mostek's arithmetic-and-register chip worked the first time, while AMI had to redo its version. Neither had trouble delivering the ROMs. Production models are either all-AMI or all-Mostek because the two suppliers' chips don't really run well together. Though the parts are the same electrically, the different locations of the precharge make it impossible for the Mostek A&R to operate with the AMI ROMs. (Actually H-P did not specify that the chips be compatible in all respects, though this could have been done if the demand had been made.)

Another important decision made by H-P was to develop a computer simulation program to check the system design and the MOS circuits. It was felt that two or more months could be saved using the computer simulation approach rather than a breadboard because engineers could work in parallel, rather than serially on a breadboard.

H-P used a general-purpose simulation program to check out each gate, each circuit, and each chip (apart from the ROM), and finally all the chips together, including the ROMs. Each MOS circuit is designed as a network of gates and delay lines. For each gate output, an algebraic equation was written as a function of the gate inputs. This produced a large set of algebraic equations to be evaluated every clock time. A printout was available so the operation of any of the gates or delay outputs could be checked as if with an oscilloscope probe.

The general-purpose simulation program was too slow to handle the algorithms on the ROMs. For these, H-P used a higher-level simulation in which only the input/output functions of each subsystem within the ROM had to be specified. If anything went wrong, it was possible to stop the program and step through it to find the trouble. Changing a punched card or two then fixed the problem.

Thanks to the simulation programs, it was possible to set up patterns for testing the completed ICs. A complete test pattern was generated by running a program and recording all the inputs and outputs on tape for final test of the IC. Nevertheless, H-P found many errors in the first ROM programs, in some cases because the simulation did not exactly duplicate the hardware. Reprograming fixed the simulation. Other minor errors in the algorithms have been found since, requiring additional alterations.

Perhaps the biggest benefit to Mostek as a supplier was that Hewlett-Packard was not only flexible in accepting suggestions for changes, but had done its homework in MOS design. Says Robert J. Paluck of Mostek, “H-P consulted its own MOS facility and learned what the MOS designer wants to see on the logic diagram— it's different from TTL, and engineers used to TTL usually don't know how to produce the logic diagram. We had to redesign only to optimize the circuit. H-P is an exception in this respect, they gave us what we needed to optimize the logic and power supply.” Paluck feels that if Mostek had gone ahead without questioning the H-P logic design, the end product would have required twice the power with larger chips than actually proved necessary.

What Mostek did

Mostek engineers took the H-P award as more than a routine contract, and planned accordingly. They set up three concurrent projects under the direction of a program manager— design and layout of the three MOS chips, construction of a hardware system simulator, and construction of a computerized production tester. An MOS design engineer assumed full responsibility for each circuit's logic, electrical implementation, and layout, and eventually for its transition into production.

“A hardware simulator of the calculator was built to verify that the proposed MOS designs were not only logically correct, but also capable of properly interfacing with the peripheral circuits,” Paluck reports. “A Mostek systems engineer was assigned to understand the entire calculator operation and construct a node-for-node simulator with TTL elements. This breadboard would not only help insure system success but also would be used to check out and characterize prototype parts. At the same time the Mostek test equipment group began the design and construction of a PDP-11 computer-controlled tester for the three chips.”

One of the reasons for these elaborate preparations was that the Mostek design team was apprehensive about H-P's computer simulator. “The first time a program is used, a computer simulator always has bugs. Sometimes it may call out an error that doesn't exist, or worse, or pass a chip that has errors due to a programing fault,” Paluck comments. Thus, while H-P felt it could save two or more months by using the simulator, Mostek was of the opinion it could head off six man-months of program debugging by building the breadboard. In giving Mostek the go-ahead to optimize the logic designs, H-P at the same time made it clear that the vendor would have to take complete responsibility for the success or failure of its alterations. In practice, however, the working relation between the two engineering groups was not as threatening as the language of the contract might have implied. Most of the communication about changes was by phone followed by documentation for H-P to check. This approach paid off.

One change achieved in this way concerned a portion of the design for the decode section of the ROM chip. Though H-P's design called for 24 loads, that is, 24 gates for burning up power, Mostek was able to cut these to four units of power consumption. In the A&R chip, Mostek cut the bit time to output, reducing the 18 levels of logic in the H-P diagram to 12 by minimizing the number of circuit paths. “To reduce power, aid in minimizing layout, and meet timing specifications, propagation paths to output buffers were reduced, look-ahead logic was added to slow paths, and various decoding and counter techniques were changed,” Paluck states. Mostek also made allowance (as did AMI) for keyboard bounce, which can completely destroy accuracy in calculations.

Transforming the logic into an electrical circuit followed. This required development of several special circuits, in addition to the logic gates, flip-flops, and output buffers. For instance, an internal clock generator that reduced the area of one chip was designed to extend, attenuate, and regulate the external clocks.

Another problem was integrating both the random logic and 400 bits of memory on the A&R chip. Mostek solved this with a high-packing-density shift register. After completing a composite drawing of the masks used in the MOS fabrication process, all the critical parts and individual circuit elements were simulated with the aid of the company's MOS transient analysis program. The composite was then ready for generating the artwork for the actual integrated circuit.

The first instruction ROM turned out to have a layout error necessitating a change in the masks and a new run of material. “On the second try the circuit operated perfectly, with a power dissipation of only 3 milliwatts, a value 10 times less than was originally quoted,” says Paluck.

The first A&R chips worked on the first try. Power dissipation for this circuit was 20 milliwatts, 10 mw below the original estimate. On the other hand, Mostek ran into electrical and layout problems in the C&T circuit which required two iterations to repair.

Paluck remarks, “The breadboard was used extensively during the check-out of this chip. With it we were able to override internal erroneous signals that might have masked possible problems in other sections of the logic.” The final version of the C&T circuit dissipates 50 mw.

Mostek ran into more difficulty when starting to ship production quantities. The computerized tester was taking time to check out, but again the hardware simulator saved the day by filling in as a slow, yet thorough tester. The computerized tester was in full swing by February, 1972, for all five of the calculator chips.

AMI'S approach

“We took a different approach from Mostek,” comments Andrew M. Prophet, manager of digital products at AMI. “We took H-P's logic and turned it into a circuit layout. One of the things we have learned is to keep the chip as small as possible, thus, all of the layout was done by hand.”
However, AMI did not take H-P's logic diagrams without question. To check them out, the company used a logic simulator. “The purpose is to simulate the customer's logic and make sure what we have in MOS is the same as what they had in software,” Prophet explains. At this point specs were also checked against the customer's original. AMI originally had some question about the number of chips specified by Hewlett-Packard that needed to be clarified.

For both vendors, the hardest of the H-P chip set specs was the call for 250-mw power dissipation. But while Mostek's prime target was to hit that spec by being conservative about speed and size, AMI's basic concern was to meet the speed spec by conservative handling of the power-dissipation requirement.

AMI's final parts run at about 100 to 120 mW, considerably higher than Mostek's. Nevertheless, Prophet feels that AMI made the correct tradeoffs on this score. Prior to the H-P contract, AMI had only produced about 10 chips with the low-threshold, ion-implanted process. As a consequence there was some question about the final speed of the parts, and since there is a fixed speed-power relation for a given process, the level of power dissipation was also kept flexible— though the engineering team knew that it could come in under the specified 250 mW. The result, Prophet confirms, “is that our power is slightly higher than Mostek's, but our devices are faster.”

Chip size is another design tradeoff that concerned AMI as well as Mostek. The rule of thumb is that the smaller the chip, the better the yield and thus the less expensive it is to make the part. Prophet is satisfied with the final chip sizes, which are smaller than Mostek's. He adds that now that AMI knows more about the ion-implantation process, “we could redesign the H-P chips to consume less power.” Ultimately the differences in size and power dissipation between AMI and Mostek chips boil down to the types of gate used. AMI employed NOR structures, which are smaller than the AND/NOR structures used by Mostek but entail a larger number of nodes so that the power dissipation is higher.

Unlike Mostek, AMI used its standard tester for the finished products, a machine called PAFT (for programable automatic function tester). PAFT was originally built to AMI specs.

And H-P did the rest

While Mostek and AMI were racing to turn around the MOS LSI chips in the shortest possible time, Hewlett-Packard had tackled other critical parts of the 35. H-P's Whitney concedes that even though H-P had to work on a multichip, plastic package for light-emitting diodes; low-power, high-current bipolar display drivers; a new type of keyboard; and the power supply, “in the end we were waiting for MOS parts.” One reason is that most of these other major parts were manufactured internally, so “top priorities could be established and overtime authorized as necessary.”

For the display, H-P developed a magnified five-digit LED cluster which saves both power and cost and comes in an easy-to-install 14-pin package [Electronics, Jan. 17, 1972, p. 64]. The 35 uses three clusters. Since LEDs are more efficient if pulsed at a low duty cycle, energy is stored in inductors and dumped into the diodes, allowing a high degree of multiplexing.

H-P also developed and manufactured special bipolar anode and cathode driver circuits for the display. The anode driver generates the two-phase system clock signals, as well as drive signals for the segments; it decodes the data from the A&R chip and inserts the decimal point; it sends shift signals to the other axis of the multiplex circuitry, and it reports low battery voltage by turning on all decimal points as a warning that only 15 minutes of operating time remain. The cathode driver contains a 15-position shift register, which is incremented for each digit position.

Since the HP-35 design started from the outside package—president Hewlett's shirt pocket being the fundamental specification—a considerable amount of planning was necessary to fit 35 keys, an on-off switch, and a 15-digit display into the front panel. The magnified LED clusters helped solve the size problem for the display. The keyboard which was to fit into an area about 2.5 inches by 4.5 in., had to deviate from the usual ¾ center-to-center key spacing. Reducing the size of each key, however, made it possible to compromise on 11/16-in. center-to-center spacing for the numeric keys and ½-in. spacing for the various function keys.

Two printed-circuit boards carry all of the circuits. One holds the specially designed spring mounts for the keyboard and the LED display, and the other has the remaining electronic components. A series of pin connectors attaches the two boards.

“In terms of customer response,” Whitney notes “the HP-35 is the most successful H-P product ever introduced. The price is a tenth that of the 9100, with 1/80 the volume in size.” And in terms of Bill Hewlett's shirt pocket, H-P's engineers and vendors are glad to report an excellent fit.

  • T. M. Whitney, F. Flodé, and C C. Tung, “The Powerful Pocketful: an Electronic Calculator Challenges the Slide Rule,” Hewlett-Packard Journal, June, 1972
  • T. M. Whitney and R. J Paluck, “MOS Circuit Development for the HP-35,” 6th Annual IEEE Computer Society International Conference, Sept. 12-14, 1972

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