HP41CL newbie question

[Sylvain Cote]

Hello Neve,

There is two possibility here ...

The first solution involve copying the ROM image(s) into 41CL RAM, then map the RAM image to a virtual port.
This solution is very easy to do and it is an ideal way to use a new ROMs while waiting for Monte to update his standard distribution file.

The second solution involve copying the ROM image(s) into 41CL Flash and manually update FLDB ROM image.
This solution is a lot longer to do, need more manipulation to complete, but has the benefit to be permanent.

I am assuming that you will update your 41CL with Monte updated package when available, so I will show the first solution for now.

In order to do this procedure, you need the following:

1. A 41CL calculator
2. The clupdate-1.1.0.jar java program
3. Your updated ROM files in the same folder as the clupdate program
   

For this procedure, I assume that you have a v3+ board where we will load the PWREXT/4LIB/YFNX configuration.

Here we go ...

1. Configuration Section
   .
   
   1. Plug the serial cable into your 41CL and to your computer
      Note: it's important to do this at the beginning because the MMU often disable itself when the serial plug is either inserted or removed
      .
   2. Start a terminal/shell/command line window on your computer and go to where the clupdate-1.1.0.jar is located
      .
   3. Load MMU with a basic configuration
      
      Code:
      

      MMUDIS              // disable 41CL memory management unit
MMUCLR              // OPTIONAL: clear 41CL memory management unit configuration
"YFNX"              // enter in ALPHA the 41CL Extreme Functions rom image ID
PLUG1L              // map YFNX ROM image to page 8
MMUEN               // enable 41CL memory management unit
      Note: you can replace the page (8) I have chosen by the one you want
      .
   4. Configure serial port
      
      Code:
      

      SERINI              // initialize the serial port
BAUD then 48        // set communication speed to 4800 bauds
      .
      
2. File download section
   .
   
   1. Here we will download the updated PWREXT1.ROM file from your PC to a RAM page (0x820) of your 41CL.
      .
   2. On your 41CL, type:
      
      Code:
      

      "820000-0FFF"       // physical destination address 0x820000 and length 0x0FFF in RAM where the ROM image will be loaded
[XEQ][ALPHA]YIMP    // here we need to prepare the next function by pressing [XEQ] [ALPHA] [Y] [I] [M] [P]
      Note: not finishing the XEQ request keeps the 41CL in waiting mode and this is what we want for now
      .
   3. On your computer, type:
      
      Code:
      

      java -jar clupdate-1.1.0.jar --upload PWREXT1.ROM SERIAL_PORT 4800 [RETURN]
      Note: replace the SERIAL_PORT tag by your actual serial port. (ex: Windows: COM3, Linux: /dev/ttyUSB0, macOS: /dev/tty.usbserial)
      .
   4. When you see the following lines on your computer:
      
      Code:
      

      HH:MM:SS --upload   [fileName: PWREXT1.ROM] [portName: SERIAL_PORT] [baudRate: 4800]
HH:MM:SS File       PWREXT1.ROM loading ...  done [YCRC=0x0370601B Rev:2018-03-12]
HH:MM:SS Serial     SERIAL_PORT opened.
HH:MM:SS Sleeping   5 seconds before starting file transfer
      Note: file upload will automatically start after 5 seconds
      .
   5. On your 41CL and within the 5 seconds allowed, type:
      
      Code:
      

      [ALPHA]             //  start the file download
      Note: you should see "RECEIVING" on your 41CL then your standard screen when finished. (ex.: 0.0000)
      .
   6. Now, we need to validate the downloaded file by typing the following on your 41CL:
      
      Code:
      

      "820"               // RAM page 0x820000
YCRC                // validates ROM image
      Note: you should see 0370601B after a while, if not, then something went wrong in one of the step above
      .
      
3. ROM image mapping section
   .
   
   1. Because we will do a hybrid ROM/RAM configuration we will use YPOKE function to do the mapping.
      Note: read Memory Management section (p.67..72) of the 41CL manual (sy41cl.pdf) to better understand the MMU mapping
      .
   2. Load Library-4 [Flash image]
      
      Code:
      

      “804040-8120”       // load LIB4 at Flash address 0x120 [8120] to page 4 bank 1 [804040]
YPOKE               // activate mapping
      .
   3. Load PowerCL Extreme, Bank 1 [updated RAM image]
      
      Code:
      

      “804090-8820”       // load PWREXT1 at RAM address 0x820 [8820] to page 9 bank 1 [804090]
YPOKE               // activate mapping
      .
   4. Load PowerCL Extreme, Bank 2 [Flash image]
      
      Code:
      

      “804098-8181”       // load PWREXT2 at Flash address 0x181 [8181] to page 9 bank 2 [804098]
YPOKE               // activate mapping
      .
   5. Load PowerCL Extreme, Bank 3 [Flash image]
      
      Code:
      

      “804094-8182”       // load PWREXT3 at Flash address 0x182 [8182] to page 9 bank 3 [804094]
YPOKE               // activate mapping
      .
   6. Load PowerCL Extreme, Bank 4 [Flash image]
      
      Code:
      

      “80409C-8183"       // load PWREXT4 at Flash address 0x183 [8183] to page 9 bank 4 [80409C]
YPOKE               // activate mapping
      .
   7. Validate the mapping by typing:
      
      Code:
      

      CAT then 2          // you should see "-PWRCL EXT" label if you have done it correctly
   
   

That's All Folks! Easy isn't it? ;-)

Sylvain

Edit: typos