Help needed: HP 67 repair

[Marcovecchio]

I'm trying to fix an HP 67. The condition is not good: no charger, battery leakage and someone already tampered with it. Before describing what I have done so far, here goes my main question: is there an easy way to make sure ROM0 and the 4 small ROM/RAM ICs are good?

Calculator status: I'm powering it with a bench supply, 3.8V. It's pulling 190mA, and display looks like this, almost all is lit:

   

On the keyboard board, both chips seem the be working, because I have the display almost completely lit. Only segment c looks strange, it's dim on some digits, and lit on the exponent signal position, but I think there's a partial short somewhere, I'll try to find it. Battery leakage killed 3 tracks, but I repaired them.

On the processor board, I confirmed Vss and Vgg are ok (+6.2V and -12V). ACT has clock on pins 16 and 17, and I see activity on ISA and Data pins on the scope. Both look noisy, but noise amplitude is less than 1V, and signal has good 6V swing, so I assume it's good.

ROM0 seems to be good: I have strobe signal, and 7 segments activity. The only segment permanently off is the dot (segment H).

I replaced the smaller capacitors, the bigger tantalum ones I don't have at hand to replace, but I removed and measured them, they're good.

Well, I think I covered everything. I'm confident something is working, the calculator displays a minus on first position, and it clearly shows the space between mantissa and exponent, so it doesn't look like random garbage on the display.

The parts I have no clue on how to test, are the ACT, and ROMs/RAMs. I'm assuming the ACT is good, because on clock and ISA activity, but I'm not 100% sure. The 4 small ROM ICs are a mistery to me, and ROM0 seems to be partially working, but I have no idea on how to confirm it's good for sure.

Please, could you help me on how to proceed from here? I have a simple logic analyser, but I have no idea on how to decode the pulses to confirm I have good data on ISA and Data lines.

Another question: how does the Data line work? All 5 ROM ICs share it. Do they keep Data in high impedance state, with only one Rom feeding it at a time?

Any help is greatly appreciated, thank you!

Eduardo