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Emulator vs simulator performance
06-10-2020, 07:57 AM
Post: #11
RE: Emulator vs simulator performance
(06-05-2020 04:56 PM)Werner Wrote:  
(06-05-2020 03:45 PM)J-F Garnier Wrote:  Yes, the 42S is internally using RPL. But Free42 is written in C, not assembly language, so the comparison is fair.
.. but Free42 is compiled, and the 42 SysRPL is interpreted.
Werner

SysRPL is not exactly interpreted. An interpreter such as HP Basic uses tokens and relies on tables to get the execution address (on HP Basic, it's quite complex and relatively slow with all the possible LEXs to scan).
In SysRPL, the "tokens" are the execution addresses themselves. The right term is probably "threaded code" as for the Forth language. But I'm not a RPL expert :-)

(06-09-2020 08:49 PM)Jonathan Busby Wrote:  
Quote:Also, it's my understanding that the 42s is implemented in SysRPL. That adds another layer of complication and slowdown compared to assembly language.
Indeed Smile RPL on Saturn CPU's involves at least *three* levels of indirection a lot of the time Smile

Quote:As I recall working with C on a 50g, the speed difference there is something like native C code is about 5x faster than Saturn assembly, which is about 5x faster than SysRPL, which is about 5x faster than User RPL. Those values may vary somewhat, but I do recall specifically that C code is about 100x faster than userRPL on the 50g.
That sounds about right Smile

What is the penalty of SysRPL compared to assembly language? I tried to answer by porting Valentin's program to the HP-32SII, emulated in Christoph's Emu42. So the comparison is done at constant CPU speed.

Here is the result, for 10,000 points as above test:
HP42S emulated on Emu42 1.24 : 5min08s (as above)
HP32SII emulated on Emu42 1.24 : 2min01s !

So despite the 32SII RPN language is not as powerful for complex numbers than the 42S, the 32SII is 2.5x more efficient than the HP42S. I didn't expect so much difference, it's a surprise for me.
The difference is not as large on the real machines, since the CPU speed is probably reduced on the 32S. The 42S is supposed to run at 1MHz, does somebody know the speed of the 32SII CPU?

For the curious, here is the HP-32S program:
Code:
; Mandelbrot area, for the HP-32S/SII
; based on Valentin Albillo's program "AM" for the HP-42S
;Variables:
;I : loop index
;J : loop index
;M : count
;N : #points
;K : #iterations
;C, D : random point under test
;F : constant = 0.25^2
;A : scratch
; labels used: A, B, C, D, E.


A01 LBL A
; initialization and input
A02 STO N       ;#points
A03 STO I
A04 0.25
A05 x^2
A06 STO F
A07 1
A08 SEED
A09 256        ; #iterations
A10 STO K
A11 CLx
A12 STO M
; main loop
B01 LBL B
B02 RCL K      ; # iterations
B03 STO J      ; in J loop index
B04 RANDOM
B05 2.5
B06 *
B07 2
B08 -
B09 STO C
B10 RANDOM
B11 1.2
B12 *
B13 STO D
; belongs to cardioid?
B14 x^2
B15 x<>y 
B16 x^2
B17 +
B18 SQRT        ; abs(z)
B19 STO A
B20 RCL D
B21 RCL/ A
B22 RCL C
B23 RCL/ A      ; z/abs(z)
B24 0
B25 2
B26 CMPLX-
B27 CMPLX*
B28 x^2
B29 x<>y
B30 x^2
B31 +              
B32 SQRT 
B33 4
B34 /
B35 RCL A
B36 x<y?
B37 GTO D
; belongs to main disk?
B38 1 
B39 RCL+ C
B40 x^2
B41 RCL D
B42 x^2
B43 +
B44 RCL F
B45 x>y?
B46 GTO D
; belongs elsewhere in M?
B47 RCL D
B48 RCL C
C01 LBL C
C02 0
C03 ENTER 
C04 CMPLX+
C05 CMPLX*          ; Z^2
C06 RCL D
C07 RCL C
C08 CMPLX+          ; Z=Z^2+C
C09 0
C10 ENTER
C11 CMPLX+
C12 x^2
C13 x<>y
C14 x^2
C15 +  ; |Z|²
C16 4
C17 x<=y?
C18 GTO E
C19 Rdn
C20 Rdn
C21 DSE J
C22 GTO C     ; next iter    
D01 LBL D
D02 ISG M     ; count++
E01 LBL E
E02 DSE I
E03 GTO B     ; next point
E04 RCL M     ; recall count
E05 RTN

J-F
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RE: Emulator vs simulator performance - J-F Garnier - 06-10-2020 07:57 AM



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