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HP28C: Hardware I/O basics
Posted by Christoph Giesselink on 20 Jan 2003, 3:30 p.m.
2. HP28C memory layout
3. MMU initialization sequence
4. Master chip control registers
5. Slave chip control registers (only relevant)
6. Master display driver/timer registers
7. Slave display driver/timer registers
8. Display (used addresses)
10. Special considerations to master/slave operation
The HP28C use 5 IC's: 1x Saturn 1LK7 CPU, 2x Centipede 1LP2 chips, 2x 64KB 1LP4 ROM chips.
The Centipede chips work in master/slave configuration.
Each Centipede chip contain
the MMU of each chip control the base address of the 1KB RAM and the base address of the display/timer/register area. Having two Centipede chips the total amount of user RAM is 2KB and enough drivers for a 137x32 pixel display. The display memory is placed in each Centipede chip and is separated from the user memory. Because not all display memory addresses (#40040-#40078) are wired with the display, these addresses are used as normal RAM to save some nibbles in the regular RAM area.
The following memory layout is the default configuration after startup. It can be modified by the standard CONFIG/UNCNFG Saturn commands.
#00000 - #3FFFF 128KB ROM #40000 - #403FF slave display driver / timer / control registers #40400 - #407FF master display driver / timer / control registers #4F000 - #4F7FF slave 1KB RAM #4F800 - #4FFFF master 1KB RAM
Slave chip RAM Slave chip display / timer / control registers Master chip RAM Master chip display / timer / control registers
#40700 LBI_CTL LBI control #40701 CONTRAST Display contrast control #40702 DSPMODE Display mode #40703 DSPCTL Display control #4070A TIMER_CTL Timer control #4070B RAMTST RAM test #4070C INPORT RX-LED pin state and service request / type #4070D LEDOUT Different modes for LED output
#40302 DSPMODE Display mode #40303 DSPCTL Display control #4030A TIMER_CTL Timer control
#40400 - #405DF Display column bit map of master #405E0 - #406DF Display row bit map #407F8 - #407FF Timer (32 bit, LSB first)
#40078 - #402DF Display column bit map of slave #403F8 - #403FF Timer (32 bit, LSB first)
#40078 - #402DF Left display area #40400 - #405DF Right display area
#40000 - #40007 Busy #40008 - #4000F Alpha #40010 - #40017 Battery #40018 - #4001F Shift #40020 - #40027 2*Pi #40028 - #4002F Halt #40030 - #40037 Printer #40038 - #4003F All Annunciators
The contrast depends on the number of set bits, the more bits are set, the darker the annunciator is getting. The bits have no weight. At about 20 set bits you reach the darkest possible value.
Each bit of an annunciator address is XORed with the corresponding bit of "All Annunciators" to get the final number of set bits.
"Master" mean: Register in master controller
"Slave" mean: Register in slave controller
The slave timer only run when the master timer is running. So switching off the master timer will also stops the slave timer.
Usage in the HP28C
Master Timer (8192Hz): tick counter Slave Timer (8192Hz): cursor blinking
The master timer is normally always running. Master Timer in connection with a 12 nibble value starting at #4F003 in user RAM builds a 1088 year counter (get the value with: # 123E SYSEVAL (1BB ROM) or # 1266 SYSEVAL (1CC ROM)). The slave timer is normally stopped. At input mode with blinking cursor the slave Timer is used to generate the blink frequency.
c dot giesselink at gmx dot de
Edited: 2 Sept 2003, 4:58 p.m.
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