Re: How many HP-15C will we buy? Message #30 Posted by Eric Smith on 28 July 2011, 12:36 p.m., in response to message #29 by Eric Rechlin
If you want larger process geometry (lithography), you certainly don't need to spend a billion dollars building a fab. There are still plenty of 350, 250, and 180 nm fabs in operation churning out chips that don't need to be in sub-100 nm. There are even some 500 nm (0.5 micron) fabs running. The mask costs at 250 nm or larger are MUCH less than at 180 nm and smaller, so it is actually quite cost-effective to get chips made on a larger, low-leakage process.
You only have to spend billions of dollars when you're building new bleeding-edge fabs, which you obviously don't do when you want to make low-power chips for calculators and other low-end consumer electronics.
The tradeoff of using an older, larger process is that they don't run as fast, and you don't get as much on-chip memory. For any calculator other than a high-end graphing, that's not a problem.
I'm not sure what process geometry is used for the Atmel AT91SAM7L128 (used in the 10bii+, 12c, 20b, 30b), but it is almost certainly NOT being made in a sub-90nm process.
The Energy Micro EFM32G "Gecko" microcontrollers Richard Ottosen and I are using for our latest prototypes use an ARM Cortex-M3 core in a TSMC 180nm ULP (ultra-low-power) process, and can achieve under 1uA current in a low-power sleep mode with a 32kHz timer running, with 16KB of battery-backed internal SRAM (unlike the Atmel part, which only battery-backs 2KB).
In our prototype, my firmware is waking up at 100 Hz running on a 40kHz crystal, and we're seeing sleep current of around 10.1 uA. When we having it running at roughly 14 MHz (on an internal RC oscillator), we have a total current of around 7.2 mA, of which about 1.5 mA is from a character LCD module, so the microcontroller is only consuming about 5.5 mA. At that clock rate, we're seeing performance about 14x that of the HP-41C (or about 25x that of the original 12C/15C), and that is on a very unoptimized code base in debug mode, so I expect that we will eventually have much higher performance for the same clock frequency and current.
|