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HP Forum Archive 19

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Loops of Addition benchmark for the 41CL
Message #1 Posted by Monte Dalrymple on 17 Aug 2010, 1:34 p.m.

I am finally able ot run the "Loops of addition" benchmark on the 41CL. The code is the usual: LBL 00 + GTO 00, and runs for 60 seconds. Starting condition is X=0, Y=1, Z=1, T=1.

1X mode: 1,055
2X Turbo mode: 1,913
5X Turbo mode: 4,153
10X Turbo mode: 6,538
20X Turbo mode: 9,179
50X Turbo mode: 12,022

The results are not linear because the NEWT CPU automatically throttles back to 1X for those instructions that must run at this speed for compatibility. For a user program such as this, each program line samples the keyboard flag and the peripheral request flag, and both of these operations must be done at 1X. In addition, all LBL program lines move the "goose" in the display, and both the display select and the display update must be done at normal speed.

Even with these "speed bumps" the results are pretty good...

Monte

      
Re: Loops of Addition benchmark for the 41CL
Message #2 Posted by Massimo Gnerucci (Italy) on 17 Aug 2010, 1:41 p.m.,
in response to message #1 by Monte Dalrymple

Quote:
Even with these "speed bumps" the results are pretty good...


Indeed!

Thanks for the update Monte! Always waiting for one/two of those marvels...

Greetings,
Massimo
      
Re: Loops of Addition benchmark for the 41CL
Message #3 Posted by gene wright on 17 Aug 2010, 4:24 p.m.,
in response to message #1 by Monte Dalrymple

Excellent! I can't wait.

I've been saving an HP 41c fullnut with this in mind.

:-)

            
Re: Loops of Addition benchmark for the 41CL
Message #4 Posted by Angel Martin on 19 Aug 2010, 2:22 a.m.,
in response to message #3 by gene wright

I can already see all those auctions for plain 41C's skyrocketing in a while..

So Gene, will you update your comprehensive article to include these data?

Best, 'AM

Edited: 19 Aug 2010, 2:24 a.m.

                  
Re: Loops of Addition benchmark for the 41CL
Message #5 Posted by Paul Dale on 19 Aug 2010, 3:04 a.m.,
in response to message #4 by Angel Martin

They'd better not go up too much, I don't have a plain 41c and that would be ideal for conversion...

- Pauli

                        
Re: Loops of Addition benchmark for the 41CL
Message #6 Posted by gene wright on 19 Aug 2010, 7:29 a.m.,
in response to message #5 by Paul Dale

As I think I remember, Monte has said that this **requires** a fullnut HP 41c.

Is that right, Monte?

                              
Re: Loops of Addition benchmark for the 41CL
Message #7 Posted by Monte Dalrymple on 19 Aug 2010, 10:45 a.m.,
in response to message #6 by gene wright

The replacement CPU board goes in any fullnut: C/CV/CX. The flash contains CX operating system code. It will contain the CX version of the time module code, but you'll need a Time Module plugged in to get the actual timer functionality. I couldn't fit that function into the circuitry.

Monte

                                    
Re: Loops of Addition benchmark for the 41CL
Message #8 Posted by gene wright on 19 Aug 2010, 11:50 a.m.,
in response to message #7 by Monte Dalrymple

Thanks for the clarification.

I'm sure quite a few people at the conference in Fort Collins will be interested in hearing more too. :-)

                                          
Re: Loops of Addition benchmark for the 41CL
Message #9 Posted by Wlodek Mier-Jedrzejowicz on 19 Aug 2010, 9:48 p.m.,
in response to message #8 by gene wright

As Gene Wright says:

Quote:
I'm sure quite a few people at the conference in Fort Collins will be interested in hearing more too. :-)

Some might even bring a fullnut 41 with them!


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