The Museum of HP Calculators

HP Forum Archive 17

 35s - how fast?Message #1 Posted by Thomas Radtke on 14 July 2007, 5:00 a.m. Sorry for abusing this noble forum once again for a 35s question: Has this machine been benchmarked already in terms of speed? Thank you :-)

 Re: 35s - how fast?Message #2 Posted by Massimo Gnerucci (Italy) on 14 July 2007, 5:29 a.m.,in response to message #1 by Thomas Radtke Read through Gene's review, in the last pages you'll find the answer... ;-) Greetings,Massimo Edited: 14 July 2007, 5:30 a.m.

 Re: 35s - how fast?Message #3 Posted by Thomas Radtke on 14 July 2007, 5:36 a.m.,in response to message #2 by Massimo Gnerucci (Italy) Stupid me, thanks a lot, Massimo! Edit: My 32SII does the looping test in 15 seconds. Twice as fast as the 35s? I must have overlooked something. Edited: 14 July 2007, 5:43 a.m.

 Re: 35s - how fast?Message #4 Posted by Eric Smith on 14 July 2007, 2:25 p.m.,in response to message #3 by Thomas Radtke The 33s and 35s use a GeneralPlus (formerly SunPlus) microcontroller with a 6502 core, which can run at up to 4 MHz, but is probably running slower in th calculator. The 32SII used an HP Saturn core at about 650 KHz, if memory serves. The Saturn core was designed to do BCD arithmetic very efficiently; fixed point BCD addition or subtraction takes only a little more than one clock per digit, as does shifting. And of course floating point is performed in software by use of a lot of fixed point adds and shifts. The 6502 takes many more cycles to do the same thing. It takes at least 3 cycles to do a binary add of a byte in memory to the accumulator, so to add two 15-digit floating point mantissas together (after they've been aligned) will require a code sequence something like the following (which is completely untested), assuming that the operands and result are stored in zero page in packed form: ```ADDM: LDX #7 CLC L1: LDA OP1,X ADC OP2,X STA OP1,X DEX BPL L1 ``` That takes about 139 cycles on the 6502, while on the Saturn the equivalent takes about 19 cycles (with operands in the 64-bit processor registers). Also, the 33s and 35s firmware is written mostly (or perhaps entirely) in C. The 6502 isn't a very good target architecture for C, so that doesn't result in efficient code. If the arithmetic routines are written in C, they may be much worse than hand-coded routines. In particular, the compiler is unlikely to infer the use of the 6502's decimal mode.

 Re: 35s - how fast?Message #5 Posted by Thomas Radtke on 14 July 2007, 2:55 p.m.,in response to message #4 by Eric Smith Thanks for giving some insights! The museum benchmarks give more reasonable figures, so hopefully most meaningful applications won't run slower on the 35s than on the pioneer. BTW, I have in mind implementing the error function which I often use and already implemented on the TI-59, PSION LZ and Sharp 1500 (the fastest!). At least, the 35s shouldn't evaluate it slower than the TI ;-)

 Re: 35s - how fast?Message #6 Posted by Andrés C. Rodríguez (Argentina) on 15 July 2007, 2:50 p.m.,in response to message #4 by Eric Smith There was and old saying which was more or less... "Software becomes slower more rapidly than hardware becomes faster" In this case, it is not only software, but also architecture (specialized vs. general purpose). However, I like (mostly) the 35s, slow as it may be.