HP Forum Archive 15

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Min. instruction set for matrix inversion Message #1 Posted by Vassilis Prevelakis on 13 May 2005, 8:44 p.m. Hi, Assuming an HP-41 style architecture, what would be the minimum instruction set to implement matrix inversion. I am not talking about number of steps, but instruction set SIZE, i.e. STO xx counts as one type of instruction, LASTx, counts as another instruction, etc. Thanks **vp

Re: Min. instruction set for matrix inversion Message #2 Posted by Vieira, Luiz C. (Brazil) on 13 May 2005, 8:59 p.m., in response to message #1 by Vassilis Prevelakis Hi, Vassilis; forgive me if this is a dumb question, but I cannot help assumming that this is algorythim dependant. Am I right? If I am not wrong, either CCD or Advantage already have their matrix inversion as functions, but I am not sure if they share the same structure, so they may use a different set of instructions. Would that be a starting point? Or am I completely off-route? Also, I read a few days ago (here) that the core of the Voyagers processor is too close to the one used in the HP41. Would the HP15C algorythim be a reference as well? You see, I'd like very much to read more about this. Thanks for posting! Cheers. Luiz (Brazil)

Re: Min. instruction set for matrix inversion Message #3 Posted by Eric Smith on 13 May 2005, 9:17 p.m., in response to message #1 by Vassilis Prevelakis You can write it entirely with a "subtract and branch if negative" instruction. The Nut CPU of the 41C doesn't have such an instruction, and memory has to be read and written with explicit instructions, so it takes a few more as a minimum: DADD=C set memory address C=REG read memory REG=C write memory ACEX exchange A, C C=C-A subtract GONC branch on no carry In practice, if you restricted yourself to only those instructions, the code would be very large, and very slow.

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