HP-38C ROM bank switching Message #1 Posted by Eric Smith on 20 Apr 2004, 3:22 a.m.
I've been trying to get the HP-38C working in Nonpareil. In the Spice series, the HP-34C, HP-38E, and HP-38C all have more than 4 Kwords of ROM. Since 4K is the addressing limit of the processor, they use bank switching. The HP-38E/C have two banks for quad 1 (1 Kword from 2000..3777 octal), for a total of 5 Kwords. The HP-34C has two banks each for quads 1, 2, and 3.
I've been trying to figure out the details of the bank switching by comparing Nonpareil traces to captured traces from the real thing. My first guess was that the instruction 1060 octal did an immediate switch of the quad the instruction was fetched from. This was quickly disproven.
The next guess was that it did the bank switch of the current quad, but delayed by one instruction cycle to allow time for a branch instruction to be fetched from the original bank. This is probably not completely correct, as the 38C isn't functional, but it does now display "Pr Error", so I think I'm on the right track.
I'll have to continue capturing traces for comparison. Currently the comparison is a fairly labor-intensive process, but I'll write a script to partially automate it.
Prior to the Spice series, the HP-19C, HP-67, HP-92, HP-95C, and HP-97 used bank switching. I suspect that the technique will be the same as that of the Spice series, but won't know until I can dump the ROMs. Before Spice, the calculators did not have a self-test, so dumping the ROMs of those will be much more difficult. With the self-test, I simply passively monitor the Phi2, SYNC, and ISA signals to grab
the ROM addresses and data as the ROM checksum is computed.
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