How the FETCH S&X instruction really works ? Message #1 Posted by Pavel Korensky on 30 Oct 2003, 11:54 a.m.
Hello,
anyone knows, how the instruction FETCH S&X (hex 330) in HP-41 ?
I know that this instruction fetch the word in system memory, at address specified in C[6:3] to C[2:0].
But what is the actual timing of this instruction ?
Let's say that in cycle 0, the HP-41 fetch this instruction from ROM (address is on ISA and ROM send the 0x330 instruction at the end of cycle also on ISA).
During the next cycle 1, the HP outputs C (with address in C[6:3]). I suppose that the mechanism is similar to WRITE S&X (hex 040) instruction, which write to MLDL.
But where and when is the peripheral unit supposed to put the word from system memory ? On ISA at the end of this cycle 1 ?
I tried to study all manuals and materials which I have, but I was not able to find any informations about this.
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