|HP82973A INT54 driver and HP3421A|
Message #1 Posted by Ellis Easley on 25 Sept 2003, 11:49 a.m.
The INT54 document in the Museum FTP site (ftp://hpmuseum.org/lif/hplink/int54h.doc)
has an example program which controls the 3421A. I haven't tried it yet but I studied it and I think it has a couple of errors that could cause problems. First, after the "enter" subroutine has read the voltage reading from the 3421A into the location "buffer", it appends terminator characters to the text using 8086 string move instructions, first "CR/LF" using a word length store string (stosw), and then the "$" terminator required by the DOS call using a byte length instruction (stosb). Because the program does two string move instructions, it is depending on the state of the "direction" flag to be set to "increment" to make sure DI is bumped up two by the stosw so the destination of the stosb will be correct, but the program has not done a "cld" (I remember it as "clear decrement") to make sure this is the case. (If anybody can show me where DOS requires the direction flag to always be set to increment, I would appreciate knowing about it. I had a run-in with this situation a few years ago.) Second, the program allows 32 bytes to be transferred in the "enter" subroutine (I don't think the 3421A would ever send this many bytes) but the space reserved for the location "buffer" is only 32 bytes, so if the program was adapted to an application where more than 29 bytes were transferred, there wouldn't be room for the three terminator characters. Since "buffer" is at the end of the program, you would probably get away with it in an old machine running MSDOS, which would be likely since the board needs a slow ISA bus, but if you were running in virtual mode, this might cause a fault.
Also, there was a discussion about the protocol used by the 3421A to communicate with its option boards. There is a pretty good description in the 3421A Operating, Programming, and Configuration Manual, section II (Option Assembly Installation and Configuration), chapter 9 (44464A Breadboard Option). It says the prototyping Breadboard is logically the same as the 8 bit I/O option board (44465A) but without the isolated receivers and drivers. Data is sent and received from the mainframe serially and the 44464A and 44465A have an 8 bit parallel/serial shift register plus a separate 8 bit latch to implement a an 8 bit I/O port. I haven't seen a description of the logic of the 44462A 10 channel mux option board, but I imagine it is similar with a 10 bit shift register. One interesting item is that the 3421A borrows "red" and "wrt" from the HPL language to use as commands for controlling the 44464A and 44465A.