|HP41 (flash) ROM/RAM/MLDL box survey|
Message #1 Posted by Meindert Kuipers on 17 Oct 2002, 6:55 a.m.
I am proceeding nicely with the development of a FPGA for a ROM/RAM/MLDL box for the HP41. This will be much like the HEPAX module, but Flash-based, meaning that ROMs can be programmed almost on the fly by the user and will be non-volatile, even without battery.
I am close to selecting hardware for prototyping, and I would like to know if there is any other interest from the HP41 community. If so, I obviously need to take a different approach. The preliminary specifications can be reviewed on www.kuipers.to/hp41, where a preliminary design (VHDL-based but no schematics yet) is available.
I do not intend to make a commercial business out of this, but rather to cover the cost. The design will be made public anyway. My current guess is that the cost will be somewhere between $100 and $200, but really depends on the technology used. My research shows that SRAM is absolutely necessary as a buffer to program Flash Eprom. The HP41 itself is simply too slow to deal with current Flash technology.
There are currently the following options:
- fit it in a module: looks feasible with BGA components, except for the SRAM battery backup. If you can all live with feeding the SRAM from the system battery than that is fine with me. The Flash Eprom is there to keep data forever. Connectors will be difficult to implement as well for I/O functions to and from a PC. I have a very limited quantity of empty modules and port connectors, and it is my intention to supply complete PCB's with components only.
- fit on a PCB inside the HP41: possible with TSOP components
- fit in a seperate box: can be any size, from shoebox to matchbox with a flatcable to the HP41 port.
Be patient, I do not expect to have any real hardware out within four months, but your input is appreciated.