|Re: Modern MLDL / EPROM box for HP41?|
Message #5 Posted by John Ioannidis on 15 June 2001, 3:33 p.m.,
in response to message #4 by Reinhard Hawel
It's good to see that there is still interest in hacking the venerable HP41!
I set out yesterday to just build the MLDL described in PPC Journal V9N3, and to my horror I realized that some of the 40xx series chips are no longer available (at least, not from DigiKey, Arrow, or JDR). And we thought that vacuum tubes were hard to get!
All the logic should be doable in an FPGA (or even a CPLD), and for memory we can just use a serial EEPROM with the SPI bus, for example, an ATMEL 25256. There are some things to be careful about, though:
1. Bits on the HP41 ISA and DATA buses are sent out LSB-first, whereas the serial EEPROMs expect them MSB-first.
This means that when we program the EEPROMs, we have to be careful to reverse the order of bits. Also, since the serial eeproms autoincrement the address and keep pumping out data bits so long as they are getting a clock, we can simply use two eeprom words for a ten-bit HP41 instruction and throw out the remaining six bits of the second address.
2. We should just program the thing from a serial port on a PC; no need to actually use the HP41's bus. This frees up a lot of logic that would have to be used to decode the DATA line, and to interpret the 040 (WRITE S&X) instruction that the MLDL used to write to its RAM.
3. Using surface-mounted devices, the logic and the
eeprom chips can easily fit inside an old module. Right now, I'm collecting as many modules as I can find cheap!
4. When the time comes to design the logic, let's form a mailing list to discuss it (or we can just discuss it here). I can host the list and the archives.
I'll post some more ideas I've had about this later.