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HP Forum Archive 06

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HP 85A is UNHAPPY!! Dead CPU?
Message #1 Posted by Chris Hoaglin on 11 Aug 2001, 5:28 p.m.

I put my 85A back together today after fixing the power supply..Now it seems to be DOA from a short circuit caused by a misaligned flexprint strip connecting the PSU to the CPU board. The symptoms are:

The CRT works, but no characters are displayed.

Typing on the keyboard does not produce text either.

The chip on the left rear of the CPU board, just in front of the two flexprint cables leading to the ROM drawer, gets rather hot. None of the other chips exhibit this heat problem. This chip is marked "IMA8 0101 82055 SINGAPORE", and I believe it is the CPU because of the connection to the ROM drawer. One of the pins on this chip is connected to one of the traces on the flexprint involved in the short.

Questions: Does anybody have a schematic for the 85?

If this is the CPU, what pins should I be looking at for the clock?

If the chip is shot, is there any way to get a replacement, or do I have to cannibalize another 85?

Re: HP 85A is UNHAPPY!! Dead CPU?
Message #2 Posted by Ellis Easley on 8 Sept 2001, 4:24 p.m.,
in response to message #1 by Chris Hoaglin

I have a service manual with a disclaimer saying HP didn't support component level repair and the schematics are reference diagrams, representative of all revisions of the PCB assemblies. The manual does support swapping of socketed ICs, however. 1MA8-0101 (U1) is called the I/O Buffer. It is connected directly to the I/O ports. A common bus connects it to the CRT assembly, the tape drive, the printer/power supply assembly, the CPU (1MB1-0001,U2), the Keyboard Controller (1MB2-0001,U3) and the RAM Controller (1MA2-0002,U8). The other chips on the "logic PC" assembly are RAMs and ROMs.

There is a four phase system clock. Each clock signal is a positive going pulse from 0 to 12 V. There is a timing diagram on the schematic which indicates that each clock has a high pulse width of 0.2 usec and that the leading edge of each clock is delayed 0.4 usec from the leading edge of the previous one. But then it shows the low time of the first clock as 1.6 usec. I think this might be a mistake, and that the period is 1.6 usec. The S/M never states the clock frequency, but I have read elswhere that it is 613 kHz, which would be closer to 1.6 usec than 1.8.

The four system clock signals are called Phase 1, Phase 12, Phase 2 and Phase 21. There are three other clock signals: RCL1, RCL2 and VCL which are used only by the CRT controller. All the clock signals are generated on the CRT assembly. A timing diagram on the CRT schematic shows the period of the clocks as 1.6 usec. They are divided down from a 9.808 MHz crystal oscillator. This divided by 16 is exactly 613 kHz.

Phase 1, Phase 12, Phase 2 and Phase 21 go to the following pins on the following chips: U1(I/O Buffer): 27, 8, 32, 26 - U2(CPU): 6, 5, 7, 4 - U3(Keyboard Controller): 17, nc, 18, nc - U4,5,6,7(ROMs): 9, 11, 8, 10 - U8(RAM Controller): 23, 25, 24, nc

The four system clocks also go to the I/O connector (byassing the I/O buffer), 1 and 2 go to the tape controller, and 1, 2 and 21 to to the printer controller.

I hope this helps.

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